1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Technologies, Inc. NVMEM CPUFreq
8
9 maintainers:
10 - Ilia Lin <ilia.lin@kernel.org>
11
12 description: |
13 In certain Qualcomm Technologies, Inc. SoCs such as QCS404, The CPU supply
14 voltage is dynamically configured by Core Power Reduction (CPR) depending on
15 current CPU frequency and efuse values.
16 CPR provides a power domain with multiple levels that are selected depending
17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
18 according to the required OPPs defined in the CPU OPP tables.
19
20 For old implementation efuses are parsed to select the correct opp table and
21 voltage and CPR is not supported/used.
22
23 select:
24 properties:
25 compatible:
26 contains:
27 enum:
28 - qcom,apq8064
29 - qcom,apq8096
30 - qcom,ipq5332
31 - qcom,ipq6018
32 - qcom,ipq8064
33 - qcom,ipq8074
34 - qcom,ipq9574
35 - qcom,msm8909
36 - qcom,msm8939
37 - qcom,msm8960
38 - qcom,msm8974
39 - qcom,msm8996
40 - qcom,qcs404
41 required:
42 - compatible
43
44 patternProperties:
45 '^opp-table(-[a-z0-9]+)?$':
46 allOf:
47 - if:
48 properties:
49 compatible:
50 enum:
51 - operating-points-v2-krait-cpu
52 - operating-points-v2-kryo-cpu
53 then:
54 $ref: /schemas/opp/opp-v2-kryo-cpu.yaml#
55
56 - if:
57 properties:
58 compatible:
59 const: operating-points-v2-qcom-level
60 then:
61 $ref: /schemas/opp/opp-v2-qcom-level.yaml#
62
63 unevaluatedProperties: false
64
65 allOf:
66 - if:
67 properties:
68 compatible:
69 contains:
70 enum:
71 - qcom,qcs404
72
73 then:
74 properties:
75 cpus:
76 type: object
77
78 patternProperties:
79 '^cpu@[0-9a-f]+$':
80 type: object
81
82 properties:
83 power-domains:
84 maxItems: 1
85
86 power-domain-names:
87 items:
88 - const: cpr
89
90 required:
91 - power-domains
92 - power-domain-names
93
94 patternProperties:
95 '^opp-table(-[a-z0-9]+)?$':
96 if:
97 properties:
98 compatible:
99 const: operating-points-v2-kryo-cpu
100 then:
101 patternProperties:
102 '^opp-?[0-9]+$':
103 required:
104 - required-opps
105
106 additionalProperties: true
107
108 examples:
109 - |
110 / {
111 model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";
112 compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404";
113 #address-cells = <2>;
114 #size-cells = <2>;
115
116 cpus {
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 CPU0: cpu@100 {
121 device_type = "cpu";
122 compatible = "arm,cortex-a53";
123 reg = <0x100>;
124 enable-method = "psci";
125 cpu-idle-states = <&CPU_SLEEP_0>;
126 next-level-cache = <&L2_0>;
127 #cooling-cells = <2>;
128 clocks = <&apcs_glb>;
129 operating-points-v2 = <&cpu_opp_table>;
130 power-domains = <&cpr>;
131 power-domain-names = "cpr";
132 };
133
134 CPU1: cpu@101 {
135 device_type = "cpu";
136 compatible = "arm,cortex-a53";
137 reg = <0x101>;
138 enable-method = "psci";
139 cpu-idle-states = <&CPU_SLEEP_0>;
140 next-level-cache = <&L2_0>;
141 #cooling-cells = <2>;
142 clocks = <&apcs_glb>;
143 operating-points-v2 = <&cpu_opp_table>;
144 power-domains = <&cpr>;
145 power-domain-names = "cpr";
146 };
147
148 CPU2: cpu@102 {
149 device_type = "cpu";
150 compatible = "arm,cortex-a53";
151 reg = <0x102>;
152 enable-method = "psci";
153 cpu-idle-states = <&CPU_SLEEP_0>;
154 next-level-cache = <&L2_0>;
155 #cooling-cells = <2>;
156 clocks = <&apcs_glb>;
157 operating-points-v2 = <&cpu_opp_table>;
158 power-domains = <&cpr>;
159 power-domain-names = "cpr";
160 };
161
162 CPU3: cpu@103 {
163 device_type = "cpu";
164 compatible = "arm,cortex-a53";
165 reg = <0x103>;
166 enable-method = "psci";
167 cpu-idle-states = <&CPU_SLEEP_0>;
168 next-level-cache = <&L2_0>;
169 #cooling-cells = <2>;
170 clocks = <&apcs_glb>;
171 operating-points-v2 = <&cpu_opp_table>;
172 power-domains = <&cpr>;
173 power-domain-names = "cpr";
174 };
175 };
176
177 cpu_opp_table: opp-table-cpu {
178 compatible = "operating-points-v2-kryo-cpu";
179 opp-shared;
180
181 opp-1094400000 {
182 opp-hz = /bits/ 64 <1094400000>;
183 required-opps = <&cpr_opp1>;
184 };
185 opp-1248000000 {
186 opp-hz = /bits/ 64 <1248000000>;
187 required-opps = <&cpr_opp2>;
188 };
189 opp-1401600000 {
190 opp-hz = /bits/ 64 <1401600000>;
191 required-opps = <&cpr_opp3>;
192 };
193 };
194
195 cpr_opp_table: opp-table-cpr {
196 compatible = "operating-points-v2-qcom-level";
197
198 cpr_opp1: opp1 {
199 opp-level = <1>;
200 qcom,opp-fuse-level = <1>;
201 };
202 cpr_opp2: opp2 {
203 opp-level = <2>;
204 qcom,opp-fuse-level = <2>;
205 };
206 cpr_opp3: opp3 {
207 opp-level = <3>;
208 qcom,opp-fuse-level = <3>;
209 };
210 };
211 };
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