1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-sha.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator
9
10 maintainers:
11 - Tudor Ambarus <tudor.ambarus@linaro.org>
12
13 properties:
14 compatible:
15 oneOf:
16 - const: atmel,at91sam9g46-sha
17 - items:
18 - const: microchip,sam9x7-sha
19 - const: atmel,at91sam9g46-sha
20
21 reg:
22 maxItems: 1
23
24 interrupts:
25 maxItems: 1
26
27 clocks:
28 maxItems: 1
29
30 clock-names:
31 const: sha_clk
32
33 dmas:
34 maxItems: 1
35 description: TX DMA Channel
36
37 dma-names:
38 const: tx
39
40 required:
41 - compatible
42 - reg
43 - interrupts
44 - clocks
45 - clock-names
46
47 additionalProperties: false
48
49 examples:
50 - |
51 #include <dt-bindings/interrupt-controller/irq.h>
52 #include <dt-bindings/interrupt-controller/arm-gic.h>
53 #include <dt-bindings/clock/at91.h>
54 #include <dt-bindings/dma/at91.h>
55
56 sha: crypto@e1814000 {
57 compatible = "atmel,at91sam9g46-sha";
58 reg = <0xe1814000 0x100>;
59 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
60 clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
61 clock-names = "sha_clk";
62 dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
63 dma-names = "tx";
64 };
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