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Linux/Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml

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  1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Inside Secure SafeXcel cryptographic engine
  8 
  9 maintainers:
 10   - Antoine Tenart <atenart@kernel.org>
 11 
 12 properties:
 13   compatible:
 14     oneOf:
 15       - const: inside-secure,safexcel-eip197b
 16       - const: inside-secure,safexcel-eip197d
 17       - const: inside-secure,safexcel-eip97ies
 18       - const: inside-secure,safexcel-eip197
 19         description: Equivalent of inside-secure,safexcel-eip197b
 20         deprecated: true
 21       - const: inside-secure,safexcel-eip97
 22         description: Equivalent of inside-secure,safexcel-eip97ies
 23         deprecated: true
 24 
 25   reg:
 26     maxItems: 1
 27 
 28   interrupts:
 29     maxItems: 6
 30 
 31   interrupt-names:
 32     items:
 33       - const: ring0
 34       - const: ring1
 35       - const: ring2
 36       - const: ring3
 37       - const: eip
 38       - const: mem
 39 
 40   clocks:
 41     minItems: 1
 42     maxItems: 2
 43 
 44   clock-names:
 45     minItems: 1
 46     items:
 47       - const: core
 48       - const: reg
 49 
 50 required:
 51   - reg
 52   - interrupts
 53   - interrupt-names
 54 
 55 allOf:
 56   - if:
 57       properties:
 58         clocks:
 59           minItems: 2
 60     then:
 61       properties:
 62         clock-names:
 63           minItems: 2
 64       required:
 65         - clock-names
 66 
 67 additionalProperties: false
 68 
 69 examples:
 70   - |
 71     #include <dt-bindings/interrupt-controller/arm-gic.h>
 72     #include <dt-bindings/interrupt-controller/irq.h>
 73 
 74     crypto@800000 {
 75         compatible = "inside-secure,safexcel-eip197b";
 76         reg = <0x800000 0x200000>;
 77         interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 78                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 79                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 80                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 81                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 82                      <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 83         interrupt-names = "ring0", "ring1", "ring2", "ring3", "eip", "mem";
 84         clocks = <&cpm_syscon0 1 26>;
 85         clock-names = "core";
 86     };

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