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Linux/Documentation/devicetree/bindings/display/msm/mdp4.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/display/msm/mdp4.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Qualcomm Adreno/Snapdragon MDP4 display controller
  8 
  9 description: >
 10   MDP4 display controller found in SoCs like MSM8960, APQ8064 and MSM8660.
 11 
 12 maintainers:
 13   - Rob Clark <robdclark@gmail.com>
 14 
 15 properties:
 16   compatible:
 17     const: qcom,mdp4
 18 
 19   clocks:
 20     minItems: 6
 21     maxItems: 6
 22 
 23   clock-names:
 24     items:
 25       - const: core_clk
 26       - const: iface_clk
 27       - const: bus_clk
 28       - const: lut_clk
 29       - const: hdmi_clk
 30       - const: tv_clk
 31 
 32   reg:
 33     maxItems: 1
 34 
 35   interrupts:
 36     maxItems: 1
 37 
 38   iommus:
 39     maxItems: 4
 40 
 41   ports:
 42     $ref: /schemas/graph.yaml#/properties/ports
 43     properties:
 44       port@0:
 45         $ref: /schemas/graph.yaml#/properties/port
 46         description: LCDC/LVDS
 47 
 48       port@1:
 49         $ref: /schemas/graph.yaml#/properties/port
 50         description: DSI1 Cmd / Video
 51 
 52       port@2:
 53         $ref: /schemas/graph.yaml#/properties/port
 54         description: DSI2 Cmd / Video
 55 
 56       port@3:
 57         $ref: /schemas/graph.yaml#/properties/port
 58         description: Digital TV
 59 
 60   qcom,lcdc-align-lsb:
 61     type: boolean
 62     description: >
 63       Indication that LSB alignment should be used for LCDC.
 64       This is only valid for 18bpp panels.
 65 
 66 required:
 67   - compatible
 68   - reg
 69   - clocks
 70   - ports
 71 
 72 additionalProperties: false
 73 
 74 examples:
 75   - |
 76     mdp: mdp@5100000 {
 77         compatible = "qcom,mdp4";
 78         reg = <0x05100000 0xf0000>;
 79         interrupts = <0 75 0>;
 80         clock-names =
 81             "core_clk",
 82             "iface_clk",
 83             "bus_clk",
 84             "lut_clk",
 85             "hdmi_clk",
 86             "tv_clk";
 87         clocks =
 88             <&mmcc 77>,
 89             <&mmcc 86>,
 90             <&mmcc 102>,
 91             <&mmcc 75>,
 92             <&mmcc 97>,
 93             <&mmcc 12>;
 94 
 95         ports {
 96             #address-cells = <1>;
 97             #size-cells = <0>;
 98 
 99             port@0 {
100                 reg = <0>;
101                 mdp_lvds_out: endpoint {
102                 };
103             };
104 
105             port@1 {
106                 reg = <1>;
107                 mdp_dsi1_out: endpoint {
108                 };
109             };
110 
111             port@2 {
112                 reg = <2>;
113                 mdp_dsi2_out: endpoint {
114                 };
115             };
116 
117             port@3 {
118                 reg = <3>;
119                 mdp_dtv_out: endpoint {
120                     remote-endpoint = <&hdmi_in>;
121                 };
122             };
123         };
124     };

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