1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 7 title: Qualcomm Display MDSS common properties 8 9 maintainers: 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 - Rob Clark <robdclark@gmail.com> 13 14 description: 15 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 16 sub-blocks like DPU display controller, DSI and DP interfaces etc. 17 18 # Do not select this by default, otherwise it is also selected for qcom,mdss 19 # devices. 20 select: 21 false 22 23 properties: 24 $nodename: 25 pattern: "^display-subsystem@[0-9a-f]+$" 26 27 reg: 28 maxItems: 1 29 30 reg-names: 31 const: mdss 32 33 power-domains: 34 maxItems: 1 35 36 clocks: 37 minItems: 2 38 maxItems: 4 39 40 clock-names: 41 minItems: 2 42 maxItems: 4 43 44 interrupts: 45 maxItems: 1 46 47 interrupt-controller: true 48 49 "#address-cells": true 50 51 "#size-cells": true 52 53 "#interrupt-cells": 54 const: 1 55 56 iommus: 57 minItems: 1 58 items: 59 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0 60 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1 61 62 ranges: true 63 64 # This is not a perfect description, but it's impossible to discern and match 65 # the entries like we do with interconnect-names 66 interconnects: 67 minItems: 1 68 items: 69 - description: Interconnect path from mdp0 (or a single mdp) port to the data bus 70 - description: Interconnect path from mdp1 port to the data bus 71 - description: Interconnect path from CPU to the reg bus 72 73 interconnect-names: 74 oneOf: 75 - minItems: 1 76 items: 77 - const: mdp0-mem 78 - const: cpu-cfg 79 80 - minItems: 2 81 items: 82 - const: mdp0-mem 83 - const: mdp1-mem 84 - const: cpu-cfg 85 86 resets: 87 items: 88 - description: MDSS_CORE reset 89 90 memory-region: 91 maxItems: 1 92 description: 93 Phandle to a node describing a reserved framebuffer memory region. 94 For example, the splash memory region set up by the bootloader. 95 96 required: 97 - reg 98 - reg-names 99 - power-domains 100 - clocks 101 - interrupts 102 - interrupt-controller 103 - iommus 104 - ranges 105 106 additionalProperties: true
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