1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm SM8250 Display DPU
8
9 maintainers:
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11
12 $ref: /schemas/display/msm/dpu-common.yaml#
13
14 properties:
15 compatible:
16 const: qcom,sm8250-dpu
17
18 reg:
19 items:
20 - description: Address offset and size for mdp register set
21 - description: Address offset and size for vbif register set
22
23 reg-names:
24 items:
25 - const: mdp
26 - const: vbif
27
28 clocks:
29 items:
30 - description: Display ahb clock
31 - description: Display hf axi clock
32 - description: Display core clock
33 - description: Display vsync clock
34
35 clock-names:
36 items:
37 - const: iface
38 - const: bus
39 - const: core
40 - const: vsync
41
42 required:
43 - compatible
44 - reg
45 - reg-names
46 - clocks
47 - clock-names
48
49 unevaluatedProperties: false
50
51 examples:
52 - |
53 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
54 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
55 #include <dt-bindings/interrupt-controller/arm-gic.h>
56 #include <dt-bindings/interconnect/qcom,sm8250.h>
57 #include <dt-bindings/power/qcom,rpmhpd.h>
58
59 display-controller@ae01000 {
60 compatible = "qcom,sm8250-dpu";
61 reg = <0x0ae01000 0x8f000>,
62 <0x0aeb0000 0x2008>;
63 reg-names = "mdp", "vbif";
64
65 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
66 <&gcc GCC_DISP_HF_AXI_CLK>,
67 <&dispcc DISP_CC_MDSS_MDP_CLK>,
68 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
69 clock-names = "iface", "bus", "core", "vsync";
70
71 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
72 assigned-clock-rates = <19200000>;
73
74 operating-points-v2 = <&mdp_opp_table>;
75 power-domains = <&rpmhpd RPMHPD_MMCX>;
76
77 interrupt-parent = <&mdss>;
78 interrupts = <0>;
79
80 ports {
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 port@0 {
85 reg = <0>;
86 endpoint {
87 remote-endpoint = <&dsi0_in>;
88 };
89 };
90
91 port@1 {
92 reg = <1>;
93 endpoint {
94 remote-endpoint = <&dsi1_in>;
95 };
96 };
97 };
98 };
99 ...
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