1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Unisoc Sharkl3 Display Processor Unit (DPU)
8
9 maintainers:
10 - Kevin Tang <kevin.tang@unisoc.com>
11
12 description: |
13 DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
14 which transfers the image data from a video memory buffer to an internal
15 LCD interface.
16
17 properties:
18 compatible:
19 const: sprd,sharkl3-dpu
20
21 reg:
22 maxItems: 1
23
24 interrupts:
25 maxItems: 1
26
27 clocks:
28 minItems: 2
29
30 clock-names:
31 items:
32 - const: clk_src_128m
33 - const: clk_src_384m
34
35 power-domains:
36 maxItems: 1
37
38 iommus:
39 maxItems: 1
40
41 port:
42 type: object
43 description:
44 A port node with endpoint definitions as defined in
45 Documentation/devicetree/bindings/media/video-interfaces.txt.
46 That port should be the output endpoint, usually output to
47 the associated DSI.
48
49 required:
50 - compatible
51 - reg
52 - interrupts
53 - clocks
54 - clock-names
55 - port
56
57 additionalProperties: false
58
59 examples:
60 - |
61 #include <dt-bindings/interrupt-controller/arm-gic.h>
62 #include <dt-bindings/clock/sprd,sc9860-clk.h>
63 dpu: dpu@63000000 {
64 compatible = "sprd,sharkl3-dpu";
65 reg = <0x63000000 0x1000>;
66 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
67 clock-names = "clk_src_128m", "clk_src_384m";
68
69 clocks = <&pll CLK_TWPLL_128M>,
70 <&pll CLK_TWPLL_384M>;
71
72 dpu_port: port {
73 dpu_out: endpoint {
74 remote-endpoint = <&dsi_in>;
75 };
76 };
77 };
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