1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/dma/brcm,bcm2835-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: BCM2835 DMA controller
8
9 maintainers:
10 - Nicolas Saenz Julienne <nsaenz@kernel.org>
11
12 description:
13 The BCM2835 DMA controller has 16 channels in total. Only the lower
14 13 channels have an associated IRQ. Some arbitrary channels are used by the
15 VideoCore firmware (1,3,6,7 in the current firmware version). The channels
16 0, 2 and 3 have special functionality and should not be used by the driver.
17
18 allOf:
19 - $ref: dma-controller.yaml#
20
21 properties:
22 compatible:
23 const: brcm,bcm2835-dma
24
25 reg:
26 maxItems: 1
27
28 interrupts:
29 description:
30 Should contain the DMA interrupts associated to the DMA channels in
31 ascending order.
32 minItems: 1
33 maxItems: 16
34
35 interrupt-names:
36 minItems: 1
37 maxItems: 16
38
39 '#dma-cells':
40 description: The single cell represents the DREQ number.
41 const: 1
42
43 brcm,dma-channel-mask:
44 $ref: /schemas/types.yaml#/definitions/uint32
45 description:
46 Bitmask of available DMA channels in ascending order that are
47 not reserved by firmware and are available to the
48 kernel. i.e. first channel corresponds to LSB.
49
50 unevaluatedProperties: false
51
52 required:
53 - compatible
54 - reg
55 - interrupts
56 - "#dma-cells"
57 - brcm,dma-channel-mask
58
59 examples:
60 - |
61 dma-controller@7e007000 {
62 compatible = "brcm,bcm2835-dma";
63 reg = <0x7e007000 0xf00>;
64 interrupts = <1 16>,
65 <1 17>,
66 <1 18>,
67 <1 19>,
68 <1 20>,
69 <1 21>,
70 <1 22>,
71 <1 23>,
72 <1 24>,
73 <1 25>,
74 <1 26>,
75 /* dma channel 11-14 share one irq */
76 <1 27>,
77 <1 27>,
78 <1 27>,
79 <1 27>,
80 /* unused shared irq for all channels */
81 <1 28>;
82 interrupt-names = "dma0",
83 "dma1",
84 "dma2",
85 "dma3",
86 "dma4",
87 "dma5",
88 "dma6",
89 "dma7",
90 "dma8",
91 "dma9",
92 "dma10",
93 "dma11",
94 "dma12",
95 "dma13",
96 "dma14",
97 "dma-shared-all";
98 #dma-cells = <1>;
99 brcm,dma-channel-mask = <0x7f35>;
100 };
101
102 ...
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