1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm Technologies Inc GPI DMA controller
8
9 maintainers:
10 - Vinod Koul <vkoul@kernel.org>
11
12 description: |
13 QCOM GPI DMA controller provides DMA capabilities for
14 peripheral buses such as I2C, UART, and SPI.
15
16 allOf:
17 - $ref: dma-controller.yaml#
18
19 properties:
20 compatible:
21 oneOf:
22 - enum:
23 - qcom,sdm845-gpi-dma
24 - qcom,sm6350-gpi-dma
25 - items:
26 - enum:
27 - qcom,qcm2290-gpi-dma
28 - qcom,qdu1000-gpi-dma
29 - qcom,sc7280-gpi-dma
30 - qcom,sdx75-gpi-dma
31 - qcom,sm6115-gpi-dma
32 - qcom,sm6375-gpi-dma
33 - qcom,sm8350-gpi-dma
34 - qcom,sm8450-gpi-dma
35 - qcom,sm8550-gpi-dma
36 - qcom,sm8650-gpi-dma
37 - qcom,x1e80100-gpi-dma
38 - const: qcom,sm6350-gpi-dma
39 - items:
40 - enum:
41 - qcom,sdm670-gpi-dma
42 - qcom,sm6125-gpi-dma
43 - qcom,sm8150-gpi-dma
44 - qcom,sm8250-gpi-dma
45 - const: qcom,sdm845-gpi-dma
46
47 reg:
48 maxItems: 1
49
50 interrupts:
51 description:
52 Interrupt lines for each GPI instance
53 minItems: 1
54 maxItems: 13
55
56 "#dma-cells":
57 const: 3
58 description: >
59 DMA clients must use the format described in dma.txt, giving a phandle
60 to the DMA controller plus the following 3 integer cells:
61 - channel: if set to 0xffffffff, any available channel will be allocated
62 for the client. Otherwise, the exact channel specified will be used.
63 - seid: serial id of the client as defined in the SoC documentation.
64 - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
65
66 iommus:
67 maxItems: 1
68
69 dma-channels:
70 maximum: 31
71
72 dma-channel-mask:
73 maxItems: 1
74
75 dma-coherent: true
76
77 required:
78 - compatible
79 - reg
80 - interrupts
81 - "#dma-cells"
82 - iommus
83 - dma-channels
84 - dma-channel-mask
85
86 additionalProperties: false
87
88 examples:
89 - |
90 #include <dt-bindings/interrupt-controller/arm-gic.h>
91 #include <dt-bindings/dma/qcom-gpi.h>
92 gpi_dma0: dma-controller@800000 {
93 compatible = "qcom,sdm845-gpi-dma";
94 #dma-cells = <3>;
95 reg = <0x00800000 0x60000>;
96 iommus = <&apps_smmu 0x0016 0x0>;
97 dma-channels = <13>;
98 dma-channel-mask = <0xfa>;
99 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
100 <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
101 <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
102 <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
103 <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
104 <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
105 <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
106 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
107 <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
109 <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
110 <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
111 <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
112 };
113
114 ...
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