1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Renesas R-Car and RZ/G DMA Controller
8
9 maintainers:
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12 allOf:
13 - $ref: dma-controller.yaml#
14
15 properties:
16 compatible:
17 oneOf:
18 - items:
19 - enum:
20 - renesas,dmac-r8a7742 # RZ/G1H
21 - renesas,dmac-r8a7743 # RZ/G1M
22 - renesas,dmac-r8a7744 # RZ/G1N
23 - renesas,dmac-r8a7745 # RZ/G1E
24 - renesas,dmac-r8a77470 # RZ/G1C
25 - renesas,dmac-r8a774a1 # RZ/G2M
26 - renesas,dmac-r8a774b1 # RZ/G2N
27 - renesas,dmac-r8a774c0 # RZ/G2E
28 - renesas,dmac-r8a774e1 # RZ/G2H
29 - renesas,dmac-r8a7790 # R-Car H2
30 - renesas,dmac-r8a7791 # R-Car M2-W
31 - renesas,dmac-r8a7792 # R-Car V2H
32 - renesas,dmac-r8a7793 # R-Car M2-N
33 - renesas,dmac-r8a7794 # R-Car E2
34 - renesas,dmac-r8a7795 # R-Car H3
35 - renesas,dmac-r8a7796 # R-Car M3-W
36 - renesas,dmac-r8a77961 # R-Car M3-W+
37 - renesas,dmac-r8a77965 # R-Car M3-N
38 - renesas,dmac-r8a77970 # R-Car V3M
39 - renesas,dmac-r8a77980 # R-Car V3H
40 - renesas,dmac-r8a77990 # R-Car E3
41 - renesas,dmac-r8a77995 # R-Car D3
42 - const: renesas,rcar-dmac
43
44 - items:
45 - enum:
46 - renesas,dmac-r8a779a0 # R-Car V3U
47 - renesas,dmac-r8a779f0 # R-Car S4-8
48 - renesas,dmac-r8a779g0 # R-Car V4H
49 - renesas,dmac-r8a779h0 # R-Car V4M
50 - const: renesas,rcar-gen4-dmac # R-Car Gen4
51
52 reg: true
53
54 interrupts:
55 minItems: 9
56 maxItems: 17
57
58 interrupt-names:
59 minItems: 9
60 items:
61 - const: error
62 - pattern: "^ch([0-9]|1[0-5])$"
63 - pattern: "^ch([0-9]|1[0-5])$"
64 - pattern: "^ch([0-9]|1[0-5])$"
65 - pattern: "^ch([0-9]|1[0-5])$"
66 - pattern: "^ch([0-9]|1[0-5])$"
67 - pattern: "^ch([0-9]|1[0-5])$"
68 - pattern: "^ch([0-9]|1[0-5])$"
69 - pattern: "^ch([0-9]|1[0-5])$"
70 - pattern: "^ch([0-9]|1[0-5])$"
71 - pattern: "^ch([0-9]|1[0-5])$"
72 - pattern: "^ch([0-9]|1[0-5])$"
73 - pattern: "^ch([0-9]|1[0-5])$"
74 - pattern: "^ch([0-9]|1[0-5])$"
75 - pattern: "^ch([0-9]|1[0-5])$"
76 - pattern: "^ch([0-9]|1[0-5])$"
77 - pattern: "^ch([0-9]|1[0-5])$"
78
79 clocks:
80 maxItems: 1
81
82 clock-names:
83 items:
84 - const: fck
85
86 '#dma-cells':
87 const: 1
88 description:
89 The cell specifies the MID/RID of the DMAC port connected to
90 the DMA client.
91
92 dma-channels:
93 minimum: 8
94 maximum: 16
95
96 dma-channel-mask: true
97
98 iommus:
99 minItems: 8
100 maxItems: 16
101
102 power-domains:
103 maxItems: 1
104
105 resets:
106 maxItems: 1
107
108 required:
109 - compatible
110 - reg
111 - interrupts
112 - interrupt-names
113 - clocks
114 - clock-names
115 - '#dma-cells'
116 - dma-channels
117 - power-domains
118 - resets
119
120 if:
121 properties:
122 compatible:
123 contains:
124 enum:
125 - renesas,rcar-gen4-dmac
126 then:
127 properties:
128 reg:
129 items:
130 - description: Base register block
131 - description: Channel register block
132 else:
133 properties:
134 reg:
135 maxItems: 1
136
137 additionalProperties: false
138
139 examples:
140 - |
141 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
142 #include <dt-bindings/interrupt-controller/arm-gic.h>
143 #include <dt-bindings/power/r8a7790-sysc.h>
144
145 dmac0: dma-controller@e6700000 {
146 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
147 reg = <0xe6700000 0x20000>;
148 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
149 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
150 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
151 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
152 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
153 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
154 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
155 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
156 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
157 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
158 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
159 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
160 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
161 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
162 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
163 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
164 interrupt-names = "error",
165 "ch0", "ch1", "ch2", "ch3",
166 "ch4", "ch5", "ch6", "ch7",
167 "ch8", "ch9", "ch10", "ch11",
168 "ch12", "ch13", "ch14";
169 clocks = <&cpg CPG_MOD 219>;
170 clock-names = "fck";
171 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
172 resets = <&cpg 219>;
173 #dma-cells = <1>;
174 dma-channels = <15>;
175 };
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