1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Synopsys DesignWare AXI DMA Controller
8
9 maintainers:
10 - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
11
12 description:
13 Synopsys DesignWare AXI DMA Controller DT Binding
14
15 allOf:
16 - $ref: dma-controller.yaml#
17
18 properties:
19 compatible:
20 enum:
21 - snps,axi-dma-1.01a
22 - intel,kmb-axi-dma
23 - starfive,jh7110-axi-dma
24 - starfive,jh8100-axi-dma
25
26 reg:
27 minItems: 1
28 items:
29 - description: Address range of the DMAC registers
30 - description: Address range of the DMAC APB registers
31
32 reg-names:
33 items:
34 - const: axidma_ctrl_regs
35 - const: axidma_apb_regs
36
37 interrupts:
38 description:
39 If the IP-core synthesis parameter DMAX_INTR_IO_TYPE is set to 1, this
40 will be per-channel interrupts. Otherwise, this is a single combined IRQ
41 for all channels.
42 minItems: 1
43 maxItems: 8
44
45 clocks:
46 items:
47 - description: Bus Clock
48 - description: Module Clock
49
50 clock-names:
51 items:
52 - const: core-clk
53 - const: cfgr-clk
54
55 '#dma-cells':
56 const: 1
57
58 dma-channels:
59 minimum: 1
60 maximum: 8
61
62 resets:
63 minItems: 1
64 maxItems: 2
65
66 snps,dma-masters:
67 description: |
68 Number of AXI masters supported by the hardware.
69 $ref: /schemas/types.yaml#/definitions/uint32
70 enum: [1, 2]
71
72 snps,data-width:
73 description: |
74 AXI data width supported by hardware.
75 (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits)
76 $ref: /schemas/types.yaml#/definitions/uint32
77 enum: [0, 1, 2, 3, 4, 5, 6]
78
79 snps,priority:
80 description: |
81 Channel priority specifier associated with the DMA channels.
82 $ref: /schemas/types.yaml#/definitions/uint32-array
83 minItems: 1
84 maxItems: 8
85
86 snps,block-size:
87 description: |
88 Channel block size specifier associated with the DMA channels.
89 $ref: /schemas/types.yaml#/definitions/uint32-array
90 minItems: 1
91 maxItems: 8
92
93 snps,axi-max-burst-len:
94 description: |
95 Restrict master AXI burst length by value specified in this property.
96 If this property is missing the maximum AXI burst length supported by
97 DMAC is used.
98 $ref: /schemas/types.yaml#/definitions/uint32
99 minimum: 1
100 maximum: 256
101
102 required:
103 - compatible
104 - reg
105 - clocks
106 - clock-names
107 - interrupts
108 - '#dma-cells'
109 - dma-channels
110 - snps,dma-masters
111 - snps,data-width
112 - snps,priority
113 - snps,block-size
114
115 if:
116 properties:
117 compatible:
118 contains:
119 enum:
120 - starfive,jh7110-axi-dma
121 then:
122 properties:
123 resets:
124 minItems: 2
125 items:
126 - description: AXI reset line
127 - description: AHB reset line
128 - description: module reset
129 else:
130 properties:
131 resets:
132 maxItems: 1
133
134 additionalProperties: false
135
136 examples:
137 - |
138 #include <dt-bindings/interrupt-controller/arm-gic.h>
139 #include <dt-bindings/interrupt-controller/irq.h>
140 /* example with snps,dw-axi-dmac */
141 dma-controller@80000 {
142 compatible = "snps,axi-dma-1.01a";
143 reg = <0x80000 0x400>;
144 clocks = <&core_clk>, <&cfgr_clk>;
145 clock-names = "core-clk", "cfgr-clk";
146 interrupt-parent = <&intc>;
147 interrupts = <27>;
148 #dma-cells = <1>;
149 dma-channels = <4>;
150 snps,dma-masters = <2>;
151 snps,data-width = <3>;
152 snps,block-size = <4096 4096 4096 4096>;
153 snps,priority = <0 1 2 3>;
154 snps,axi-max-burst-len = <16>;
155 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.