1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: MediaTek mt8186 DSP core
8
9 maintainers:
10 - Tinghan Shen <tinghan.shen@mediatek.com>
11
12 description: |
13 MediaTek mt8186 SoC contains a DSP core used for
14 advanced pre- and post- audio processing.
15
16 properties:
17 compatible:
18 enum:
19 - mediatek,mt8186-dsp
20 - mediatek,mt8188-dsp
21
22 reg:
23 items:
24 - description: Address and size of the DSP config registers
25 - description: Address and size of the DSP SRAM
26 - description: Address and size of the DSP secure registers
27 - description: Address and size of the DSP bus registers
28
29 reg-names:
30 items:
31 - const: cfg
32 - const: sram
33 - const: sec
34 - const: bus
35
36 clocks:
37 items:
38 - description: mux for audio dsp clock
39 - description: mux for audio dsp local bus
40
41 clock-names:
42 items:
43 - const: audiodsp
44 - const: adsp_bus
45
46 power-domains:
47 maxItems: 1
48
49 mboxes:
50 items:
51 - description: mailbox for receiving audio DSP requests.
52 - description: mailbox for transmitting requests to audio DSP.
53
54 mbox-names:
55 items:
56 - const: rx
57 - const: tx
58
59 memory-region:
60 items:
61 - description: dma buffer between host and DSP.
62 - description: DSP system memory.
63
64 required:
65 - compatible
66 - reg
67 - reg-names
68 - clocks
69 - clock-names
70 - power-domains
71 - mbox-names
72 - mboxes
73
74 additionalProperties: false
75
76 examples:
77 - |
78 #include <dt-bindings/clock/mt8186-clk.h>
79 dsp@10680000 {
80 compatible = "mediatek,mt8186-dsp";
81 reg = <0x10680000 0x2000>,
82 <0x10800000 0x100000>,
83 <0x1068b000 0x100>,
84 <0x1068f000 0x1000>;
85 reg-names = "cfg", "sram", "sec", "bus";
86 clocks = <&topckgen CLK_TOP_AUDIODSP>,
87 <&topckgen CLK_TOP_ADSP_BUS>;
88 clock-names = "audiodsp",
89 "adsp_bus";
90 power-domains = <&spm 6>;
91 mbox-names = "rx", "tx";
92 mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
93 };
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