1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 # Copyright 2024 NXP 3 %YAML 1.2 4 --- 5 $id: http://devicetree.org/schemas/firmware/nxp,imx95-scmi-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 8 title: i.MX System Control and Management Interface (SCMI) Pinctrl Protocol 9 10 maintainers: 11 - Peng Fan <peng.fan@nxp.com> 12 13 allOf: 14 - $ref: /schemas/pinctrl/pinctrl.yaml 15 16 patternProperties: 17 'grp$': 18 type: object 19 description: 20 Pinctrl node's client devices use subnodes for desired pin configuration. 21 Client device subnodes use below standard properties. 22 23 unevaluatedProperties: false 24 25 properties: 26 fsl,pins: 27 description: 28 each entry consists of 6 integers and represents the mux and config 29 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg 30 mux_val input_val> are specified using a PIN_FUNC_ID macro, which can 31 be found in <arch/arm64/boot/dts/freescale/imx95-pinfunc.h>. The last 32 integer CONFIG is the pad setting value like pull-up on this pin. 33 Please refer to i.MX95 Reference Manual for detailed CONFIG settings. 34 $ref: /schemas/types.yaml#/definitions/uint32-matrix 35 items: 36 items: 37 - description: | 38 "mux_reg" indicates the offset of mux register. 39 - description: | 40 "conf_reg" indicates the offset of pad configuration register. 41 - description: | 42 "input_reg" indicates the offset of select input register. 43 - description: | 44 "mux_val" indicates the mux value to be applied. 45 - description: | 46 "input_val" indicates the select input value to be applied. 47 - description: | 48 "pad_setting" indicates the pad configuration value to be applied. 49 50 required: 51 - fsl,pins 52 53 additionalProperties: true
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