1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Altera FPGA/HPS Bridge
8
9 maintainers:
10 - Xu Yilun <yilun.xu@intel.com>
11
12 allOf:
13 - $ref: fpga-bridge.yaml#
14
15 properties:
16 compatible:
17 enum:
18 - altr,socfpga-lwhps2fpga-bridge
19 - altr,socfpga-hps2fpga-bridge
20 - altr,socfpga-fpga2hps-bridge
21
22 reg:
23 maxItems: 1
24
25 resets:
26 maxItems: 1
27
28 clocks:
29 maxItems: 1
30
31 required:
32 - compatible
33 - reg
34 - clocks
35 - resets
36
37 unevaluatedProperties: false
38
39 examples:
40 - |
41 #include <dt-bindings/reset/altr,rst-mgr.h>
42
43 fpga-bridge@ff400000 {
44 compatible = "altr,socfpga-lwhps2fpga-bridge";
45 reg = <0xff400000 0x100000>;
46 bridge-enable = <0>;
47 clocks = <&l4_main_clk>;
48 resets = <&rst LWHPS2FPGA_RESET>;
49 };
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