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TOMOYO Linux Cross Reference
Linux/Documentation/devicetree/bindings/fpga/xlnx,fpga-selectmap.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Xilinx SelectMAP FPGA interface
  8 
  9 maintainers:
 10   - Charles Perry <charles.perry@savoirfairelinux.com>
 11 
 12 description: |
 13   Xilinx 7 Series FPGAs support a method of loading the bitstream over a
 14   parallel port named the SelectMAP interface in the documentation. Only
 15   the x8 mode is supported where data is loaded at one byte per rising edge of
 16   the clock, with the MSB of each byte presented to the D0 pin.
 17 
 18   Datasheets:
 19     https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
 20 
 21 allOf:
 22   - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
 23 
 24 properties:
 25   compatible:
 26     enum:
 27       - xlnx,fpga-xc7s-selectmap
 28       - xlnx,fpga-xc7a-selectmap
 29       - xlnx,fpga-xc7k-selectmap
 30       - xlnx,fpga-xc7v-selectmap
 31 
 32   reg:
 33     description:
 34       At least 1 byte of memory mapped IO
 35     maxItems: 1
 36 
 37   prog-gpios:
 38     description:
 39       config pin (referred to as PROGRAM_B in the manual)
 40     maxItems: 1
 41 
 42   done-gpios:
 43     description:
 44       config status pin (referred to as DONE in the manual)
 45     maxItems: 1
 46 
 47   init-gpios:
 48     description:
 49       initialization status and configuration error pin
 50       (referred to as INIT_B in the manual)
 51     maxItems: 1
 52 
 53   csi-gpios:
 54     description:
 55       chip select pin (referred to as CSI_B in the manual)
 56       Optional gpio for if the bus controller does not provide a chip select.
 57     maxItems: 1
 58 
 59   rdwr-gpios:
 60     description:
 61       read/write select pin (referred to as RDWR_B in the manual)
 62       Optional gpio for if the bus controller does not provide this pin.
 63     maxItems: 1
 64 
 65 required:
 66   - compatible
 67   - reg
 68   - prog-gpios
 69   - done-gpios
 70   - init-gpios
 71 
 72 unevaluatedProperties: false
 73 
 74 examples:
 75   - |
 76     #include <dt-bindings/gpio/gpio.h>
 77     fpga-mgr@8000000 {
 78       compatible = "xlnx,fpga-xc7s-selectmap";
 79       reg = <0x8000000 0x4>;
 80       prog-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
 81       init-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
 82       done-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
 83       csi-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 84       rdwr-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
 85     };
 86 ...

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