1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
8
9 maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11
12 properties:
13 compatible:
14 oneOf:
15 - enum:
16 - fsl,mpc5121-gpio
17 - fsl,mpc5125-gpio
18 - fsl,mpc8349-gpio
19 - fsl,mpc8572-gpio
20 - fsl,mpc8610-gpio
21 - fsl,pq3-gpio
22 - items:
23 - enum:
24 - fsl,ls1021a-gpio
25 - fsl,ls1028a-gpio
26 - fsl,ls1043a-gpio
27 - fsl,ls1046a-gpio
28 - fsl,ls1088a-gpio
29 - fsl,ls2080a-gpio
30 - const: fsl,qoriq-gpio
31
32 reg:
33 maxItems: 1
34
35 interrupts:
36 maxItems: 1
37
38 "#gpio-cells":
39 const: 2
40
41 gpio-controller: true
42
43 interrupt-controller: true
44
45 "#interrupt-cells":
46 const: 2
47
48 gpio-line-names:
49 minItems: 1
50 maxItems: 32
51
52 little-endian:
53 $ref: /schemas/types.yaml#/definitions/flag
54 description:
55 GPIO registers are used as little endian. If not
56 present registers are used as big endian by default.
57
58 required:
59 - compatible
60 - reg
61 - interrupts
62 - "#gpio-cells"
63
64 additionalProperties: false
65
66 examples:
67 - |
68 gpio@1100 {
69 compatible = "fsl,mpc5125-gpio";
70 reg = <0x1100 0x080>;
71 interrupts = <78 0x8>;
72 gpio-controller;
73 #gpio-cells = <2>;
74 };
75
76 - |
77 #include <dt-bindings/interrupt-controller/arm-gic.h>
78 gpio@2300000 {
79 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
80 reg = <0x2300000 0x10000>;
81 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
82 little-endian;
83 gpio-controller;
84 #gpio-cells = <2>;
85 interrupt-controller;
86 #interrupt-cells = <2>;
87 };
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