1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Nuvoton SGPIO controller
8
9 maintainers:
10 - Jim LIU <JJLIU0@nuvoton.com>
11
12 description: |
13 This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC and detailed
14 information is in the NPCM7XX/8XX SERIAL I/O EXPANSION INTERFACE section.
15 Nuvoton NPCM7xx SGPIO module is combines a serial to parallel IC (HC595)
16 and a parallel to serial IC (HC165).
17 Clock is a division of the APB3 clock.
18 This interface has 4 pins (D_out , D_in, S_CLK, LDSH).
19 NPCM7xx/NPCM8xx have two sgpio modules. Each module can support up
20 to 64 output pins, and up to 64 input pins, the pin is only for GPI or GPO.
21 GPIO pins can be programmed to support the following options
22 - Support interrupt option for each input port and various interrupt
23 sensitivity options (level-high, level-low, edge-high, edge-low)
24 - ngpios is number of nuvoton,input-ngpios GPIO lines and nuvoton,output-ngpios GPIO lines.
25 nuvoton,input-ngpios GPIO lines is only for GPI.
26 nuvoton,output-ngpios GPIO lines is only for GPO.
27
28 properties:
29 compatible:
30 enum:
31 - nuvoton,npcm750-sgpio
32 - nuvoton,npcm845-sgpio
33
34 reg:
35 maxItems: 1
36
37 gpio-controller: true
38
39 '#gpio-cells':
40 const: 2
41
42 interrupts:
43 maxItems: 1
44
45 clocks:
46 maxItems: 1
47
48 nuvoton,input-ngpios:
49 $ref: /schemas/types.yaml#/definitions/uint32
50 description:
51 The numbers of GPIO's exposed. GPIO lines are only for GPI.
52 minimum: 0
53 maximum: 64
54
55 nuvoton,output-ngpios:
56 $ref: /schemas/types.yaml#/definitions/uint32
57 description:
58 The numbers of GPIO's exposed. GPIO lines are only for GPO.
59 minimum: 0
60 maximum: 64
61
62 required:
63 - compatible
64 - reg
65 - gpio-controller
66 - '#gpio-cells'
67 - interrupts
68 - nuvoton,input-ngpios
69 - nuvoton,output-ngpios
70 - clocks
71
72 additionalProperties: false
73
74 examples:
75 - |
76 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
77 #include <dt-bindings/interrupt-controller/arm-gic.h>
78 gpio8: gpio@101000 {
79 compatible = "nuvoton,npcm750-sgpio";
80 reg = <0x101000 0x200>;
81 clocks = <&clk NPCM7XX_CLK_APB3>;
82 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
83 gpio-controller;
84 #gpio-cells = <2>;
85 nuvoton,input-ngpios = <64>;
86 nuvoton,output-ngpios = <64>;
87 };
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