1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: nuvoton NPCM7XX I2C Controller
8
9 description: |
10 I2C bus controllers of the NPCM series support both master and
11 slave mode. Each controller can switch between master and slave at run time
12 (i.e. IPMB mode). HW FIFO for TX and RX are supported.
13
14 maintainers:
15 - Tali Perry <tali.perry1@gmail.com>
16
17 properties:
18 compatible:
19 enum:
20 - nuvoton,npcm750-i2c
21 - nuvoton,npcm845-i2c
22
23 reg:
24 maxItems: 1
25
26 interrupts:
27 maxItems: 1
28
29 clocks:
30 maxItems: 1
31 description: Reference clock for the I2C bus
32
33 clock-frequency:
34 description: Desired I2C bus clock frequency in Hz. If not specified,
35 the default 100 kHz frequency will be used.
36 possible values are 100000, 400000 and 1000000.
37 default: 100000
38 enum: [100000, 400000, 1000000]
39
40 nuvoton,sys-mgr:
41 $ref: /schemas/types.yaml#/definitions/phandle
42 description: The phandle of system manager register node.
43
44 required:
45 - compatible
46 - reg
47 - interrupts
48 - clocks
49
50 allOf:
51 - $ref: /schemas/i2c/i2c-controller.yaml#
52 - if:
53 properties:
54 compatible:
55 contains:
56 const: nuvoton,npcm845-i2c
57
58 then:
59 required:
60 - nuvoton,sys-mgr
61
62 unevaluatedProperties: false
63
64 examples:
65 - |
66 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
67 #include <dt-bindings/interrupt-controller/arm-gic.h>
68 i2c0: i2c@80000 {
69 reg = <0x80000 0x1000>;
70 clocks = <&clk NPCM7XX_CLK_APB2>;
71 clock-frequency = <100000>;
72 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
73 compatible = "nuvoton,npcm750-i2c";
74 nuvoton,sys-mgr = <&gcr>;
75 };
76
77 ...
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