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Linux/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
  8 
  9 maintainers:
 10   - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
 11 
 12 allOf:
 13   - $ref: /schemas/i2c/i2c-controller.yaml#
 14   - if:
 15       properties:
 16         compatible:
 17           contains:
 18             enum:
 19               - st,stm32f7-i2c
 20               - st,stm32mp13-i2c
 21               - st,stm32mp15-i2c
 22               - st,stm32mp25-i2c
 23     then:
 24       properties:
 25         i2c-scl-rising-time-ns:
 26           default: 25
 27 
 28         i2c-scl-falling-time-ns:
 29           default: 10
 30     else:
 31       properties:
 32         st,syscfg-fmp: false
 33 
 34   - if:
 35       properties:
 36         compatible:
 37           contains:
 38             enum:
 39               - st,stm32f4-i2c
 40     then:
 41       properties:
 42         clock-frequency:
 43           enum: [100000, 400000]
 44 
 45   - if:
 46       properties:
 47         compatible:
 48           contains:
 49             enum:
 50               - st,stm32f4-i2c
 51               - st,stm32f7-i2c
 52               - st,stm32mp13-i2c
 53               - st,stm32mp15-i2c
 54     then:
 55       properties:
 56         interrupts:
 57           minItems: 2
 58 
 59         interrupt-names:
 60           minItems: 2
 61     else:
 62       properties:
 63         interrupts:
 64           maxItems: 1
 65 
 66         interrupt-names:
 67           maxItems: 1
 68 
 69 properties:
 70   compatible:
 71     enum:
 72       - st,stm32f4-i2c
 73       - st,stm32f7-i2c
 74       - st,stm32mp13-i2c
 75       - st,stm32mp15-i2c
 76       - st,stm32mp25-i2c
 77 
 78   reg:
 79     maxItems: 1
 80 
 81   interrupts:
 82     items:
 83       - description: interrupt ID for I2C event
 84       - description: interrupt ID for I2C error
 85     minItems: 1
 86 
 87   interrupt-names:
 88     items:
 89       - const: event
 90       - const: error
 91     minItems: 1
 92 
 93   resets:
 94     maxItems: 1
 95 
 96   clocks:
 97     maxItems: 1
 98 
 99   dmas:
100     items:
101       - description: RX DMA Channel phandle
102       - description: TX DMA Channel phandle
103 
104   dma-names:
105     items:
106       - const: rx
107       - const: tx
108 
109   clock-frequency:
110     description: Desired I2C bus clock frequency in Hz. If not specified,
111                  the default 100 kHz frequency will be used.
112                  For STM32F7, STM32H7 and STM32MP1 SoCs, if timing parameters
113                  match, the bus clock frequency can be from 1Hz to 1MHz.
114     default: 100000
115     minimum: 1
116     maximum: 1000000
117 
118   st,syscfg-fmp:
119     description: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
120       Plus speed is selected by slave.
121     $ref: /schemas/types.yaml#/definitions/phandle-array
122     items:
123       - items:
124           - description: phandle to syscfg
125           - description: register offset within syscfg
126           - description: register bitmask for FMP bit
127 
128   wakeup-source: true
129 
130   access-controllers:
131     minItems: 1
132     maxItems: 2
133 
134 required:
135   - compatible
136   - reg
137   - interrupts
138   - resets
139   - clocks
140 
141 unevaluatedProperties: false
142 
143 examples:
144   - |
145     #include <dt-bindings/mfd/stm32f7-rcc.h>
146     #include <dt-bindings/clock/stm32fx-clock.h>
147     //Example 1 (with st,stm32f4-i2c compatible)
148     i2c@40005400 {
149         compatible = "st,stm32f4-i2c";
150         reg = <0x40005400 0x400>;
151         interrupts = <31>,
152                      <32>;
153         resets = <&rcc 277>;
154         clocks = <&rcc 0 149>;
155         #address-cells = <1>;
156         #size-cells = <0>;
157     };
158 
159   - |
160     #include <dt-bindings/mfd/stm32f7-rcc.h>
161     #include <dt-bindings/clock/stm32fx-clock.h>
162     //Example 2 (with st,stm32f7-i2c compatible)
163     i2c@40005800 {
164         compatible = "st,stm32f7-i2c";
165         reg = <0x40005800 0x400>;
166         interrupts = <31>,
167                      <32>;
168         resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
169         clocks = <&rcc 1 CLK_I2C1>;
170         #address-cells = <1>;
171         #size-cells = <0>;
172     };
173 
174   - |
175     #include <dt-bindings/mfd/stm32f7-rcc.h>
176     #include <dt-bindings/clock/stm32fx-clock.h>
177     //Example 3 (with st,stm32mp15-i2c compatible on stm32mp)
178     #include <dt-bindings/interrupt-controller/arm-gic.h>
179     #include <dt-bindings/clock/stm32mp1-clks.h>
180     #include <dt-bindings/reset/stm32mp1-resets.h>
181     i2c@40013000 {
182         compatible = "st,stm32mp15-i2c";
183         reg = <0x40013000 0x400>;
184         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
185                      <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
186         clocks = <&rcc I2C2_K>;
187         resets = <&rcc I2C2_R>;
188         i2c-scl-rising-time-ns = <185>;
189         i2c-scl-falling-time-ns = <20>;
190         st,syscfg-fmp = <&syscfg 0x4 0x2>;
191         #address-cells = <1>;
192         #size-cells = <0>;
193     };

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