1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
8
9 maintainers:
10 - Abel Vesa <abel.vesa@linaro.org>
11 - Neil Armstrong <neil.armstrong@linaro.org>
12
13 description: |
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
17 associated with each execution environment. Provider nodes must point to at
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
20
21 See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
22
23 properties:
24 compatible:
25 enum:
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
33 - qcom,sm8650-lpass-lpiaon-noc
34 - qcom,sm8650-lpass-lpicx-noc
35 - qcom,sm8650-mc-virt
36 - qcom,sm8650-mmss-noc
37 - qcom,sm8650-nsp-noc
38 - qcom,sm8650-pcie-anoc
39 - qcom,sm8650-system-noc
40
41 reg:
42 maxItems: 1
43
44 clocks:
45 minItems: 1
46 maxItems: 2
47
48 required:
49 - compatible
50
51 allOf:
52 - $ref: qcom,rpmh-common.yaml#
53 - if:
54 properties:
55 compatible:
56 contains:
57 enum:
58 - qcom,sm8650-clk-virt
59 - qcom,sm8650-mc-virt
60 then:
61 properties:
62 reg: false
63 else:
64 required:
65 - reg
66
67 - if:
68 properties:
69 compatible:
70 contains:
71 enum:
72 - qcom,sm8650-pcie-anoc
73 then:
74 properties:
75 clocks:
76 items:
77 - description: aggre-NOC PCIe AXI clock
78 - description: cfg-NOC PCIe a-NOC AHB clock
79
80 - if:
81 properties:
82 compatible:
83 contains:
84 enum:
85 - qcom,sm8650-aggre1-noc
86 then:
87 properties:
88 clocks:
89 items:
90 - description: aggre UFS PHY AXI clock
91 - description: aggre USB3 PRIM AXI clock
92
93 - if:
94 properties:
95 compatible:
96 contains:
97 enum:
98 - qcom,sm8650-aggre2-noc
99 then:
100 properties:
101 clocks:
102 items:
103 - description: RPMH CC IPA clock
104
105 - if:
106 properties:
107 compatible:
108 contains:
109 enum:
110 - qcom,sm8650-aggre1-noc
111 - qcom,sm8650-aggre2-noc
112 - qcom,sm8650-pcie-anoc
113 then:
114 required:
115 - clocks
116 else:
117 properties:
118 clocks: false
119
120 unevaluatedProperties: false
121
122 examples:
123 - |
124 clk_virt: interconnect-0 {
125 compatible = "qcom,sm8650-clk-virt";
126 #interconnect-cells = <2>;
127 qcom,bcm-voters = <&apps_bcm_voter>;
128 };
129
130 aggre1_noc: interconnect@16e0000 {
131 compatible = "qcom,sm8650-aggre1-noc";
132 reg = <0x016e0000 0x14400>;
133 #interconnect-cells = <2>;
134 clocks = <&gcc_phy_axi_clk>, <&gcc_prim_axi_clk>;
135 qcom,bcm-voters = <&apps_bcm_voter>;
136 };
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