1 Alpine MSIX controller
2
3 See arm,gic-v3.txt for SPI and MSI definitions.
4
5 Required properties:
6
7 - compatible: should be "al,alpine-msix"
8 - reg: physical base address and size of the registers
9 - interrupt-controller: identifies the node as an interrupt controller
10 - msi-controller: identifies the node as an PCI Message Signaled Interrupt
11 controller
12 - al,msi-base-spi: SPI base of the MSI frame
13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
14
15 Example:
16
17 msix: msix {
18 compatible = "al,alpine-msix";
19 reg = <0x0 0xfbe00000 0x0 0x100000>;
20 interrupt-parent = <&gic>;
21 interrupt-controller;
22 msi-controller;
23 al,msi-base-spi = <160>;
24 al,msi-num-spis = <160>;
25 };
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