1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale IRQSTEER Interrupt Multiplexer
8
9 maintainers:
10 - Lucas Stach <l.stach@pengutronix.de>
11
12 properties:
13 compatible:
14 oneOf:
15 - const: fsl,imx-irqsteer
16 - items:
17 - enum:
18 - fsl,imx8m-irqsteer
19 - fsl,imx8mp-irqsteer
20 - fsl,imx8qm-irqsteer
21 - fsl,imx8qxp-irqsteer
22 - const: fsl,imx-irqsteer
23
24 reg:
25 maxItems: 1
26
27 interrupts:
28 description: |
29 should contain the up to 8 parent interrupt lines used to multiplex
30 the input interrupts. They should be specified sequentially from
31 output 0 to 7.
32 items:
33 - description: output interrupt 0
34 - description: output interrupt 1
35 - description: output interrupt 2
36 - description: output interrupt 3
37 - description: output interrupt 4
38 - description: output interrupt 5
39 - description: output interrupt 6
40 - description: output interrupt 7
41 minItems: 1
42
43 clocks:
44 maxItems: 1
45
46 clock-names:
47 const: ipg
48
49 power-domains:
50 maxItems: 1
51
52 interrupt-controller: true
53
54 "#interrupt-cells":
55 const: 1
56
57 fsl,channel:
58 $ref: /schemas/types.yaml#/definitions/uint32
59 description: |
60 u32 value representing the output channel that all input IRQs should be
61 steered into.
62
63 fsl,num-irqs:
64 $ref: /schemas/types.yaml#/definitions/uint32
65 description: |
66 u32 value representing the number of input interrupts of this channel,
67 should be multiple of 32 input interrupts and up to 512 interrupts.
68
69 required:
70 - compatible
71 - reg
72 - interrupts
73 - clocks
74 - clock-names
75 - interrupt-controller
76 - "#interrupt-cells"
77 - fsl,channel
78 - fsl,num-irqs
79
80 allOf:
81 - if:
82 properties:
83 compatible:
84 contains:
85 enum:
86 - fsl,imx8mp-irqsteer
87 - fsl,imx8qm-irqsteer
88 - fsl,imx8qxp-irqsteer
89 then:
90 required:
91 - power-domains
92 else:
93 properties:
94 power-domains: false
95
96 additionalProperties: false
97
98 examples:
99 - |
100 #include <dt-bindings/clock/imx8mq-clock.h>
101 #include <dt-bindings/interrupt-controller/arm-gic.h>
102
103 interrupt-controller@32e2d000 {
104 compatible = "fsl,imx-irqsteer";
105 reg = <0x32e2d000 0x1000>;
106 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
107 clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
108 clock-names = "ipg";
109 fsl,channel = <0>;
110 fsl,num-irqs = <64>;
111 interrupt-controller;
112 #interrupt-cells = <1>;
113 };
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