1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
2
3 This binding specifies what properties must be available in the device tree
4 representation of a PDC IRQ controller. This has a number of input interrupt
5 lines which can wake the system, and are passed on through output interrupt
6 lines.
7
8 Required properties:
9
10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
12
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
15
16 - interrupt-controller: The presence of this property identifies the node
17 as an interrupt controller. No property value shall be defined.
18
19 - #interrupt-cells: Specifies the number of cells needed to encode an
20 interrupt source. The type shall be a <u32> and the value shall be 2.
21
22 - num-perips: Number of waking peripherals.
23
24 - num-syswakes: Number of SysWake inputs.
25
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
28 interrupts in order.
29
30 * Interrupt Specifier Definition
31
32 Interrupt specifiers consists of 2 cells encoded as follows:
33
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
35 0-7: Peripheral interrupts
36 8-15: SysWake interrupts
37
38 - <2nd-cell>: The level-sense information, encoded using the Linux interrupt
39 flags as follows (only 4 valid for peripheral interrupts):
40 0 = none (decided by software)
41 1 = low-to-high edge triggered
42 2 = high-to-low edge triggered
43 3 = both edge triggered
44 4 = active-high level-sensitive (required for perip irqs)
45 8 = active-low level-sensitive
46
47 * Examples
48
49 Example 1:
50
51 /*
52 * TZ1090 PDC block
53 */
54 pdc: pdc@02006000 {
55 // This is an interrupt controller node.
56 interrupt-controller;
57
58 // Three cells to encode interrupt sources.
59 #interrupt-cells = <2>;
60
61 // Offset address of 0x02006000 and size of 0x1000.
62 reg = <0x02006000 0x1000>;
63
64 // Compatible with Meta hardware trigger block.
65 compatible = "img,pdc-intc";
66
67 // Three peripherals are connected.
68 num-perips = <3>;
69
70 // Four SysWakes are connected.
71 num-syswakes = <4>;
72
73 interrupts = <18 4 /* level */>, /* Syswakes */
74 <30 4 /* level */>, /* Peripheral 0 (RTC) */
75 <29 4 /* level */>, /* Peripheral 1 (IR) */
76 <31 4 /* level */>; /* Peripheral 2 (WDT) */
77 };
78
79 Example 2:
80
81 /*
82 * An SoC peripheral that is wired through the PDC.
83 */
84 rtc0 {
85 // The interrupt controller that this device is wired to.
86 interrupt-parent = <&pdc>;
87
88 // Interrupt source Peripheral 0
89 interrupts = <0 /* Peripheral 0 (RTC) */
90 4> /* IRQ_TYPE_LEVEL_HIGH */
91 };
92
93 Example 3:
94
95 /*
96 * An interrupt generating device that is wired to a SysWake pin.
97 */
98 touchscreen0 {
99 // The interrupt controller that this device is wired to.
100 interrupt-parent = <&pdc>;
101
102 // Interrupt source SysWake 0 that is active-low level-sensitive
103 interrupts = <8 /* SysWake0 */
104 8 /* IRQ_TYPE_LEVEL_LOW */>;
105 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.