1 Marvell Orion SoC interrupt controllers
2
3 * Main interrupt controller
4
5 Required properties:
6 - compatible: shall be "marvell,orion-intc"
7 - reg: base address(es) of interrupt registers starting with CAUSE register
8 - interrupt-controller: identifies the node as an interrupt controller
9 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
10
11 The interrupt sources map to the corresponding bits in the interrupt
12 registers, i.e.
13 - 0 maps to bit 0 of first base address,
14 - 1 maps to bit 1 of first base address,
15 - 32 maps to bit 0 of second base address, and so on.
16
17 Example:
18 intc: interrupt-controller {
19 compatible = "marvell,orion-intc";
20 interrupt-controller;
21 #interrupt-cells = <1>;
22 /* Dove has 64 first level interrupts */
23 reg = <0x20200 0x10>, <0x20210 0x10>;
24 };
25
26 * Bridge interrupt controller
27
28 Required properties:
29 - compatible: shall be "marvell,orion-bridge-intc"
30 - reg: base address of bridge interrupt registers starting with CAUSE register
31 - interrupts: bridge interrupt of the main interrupt controller
32 - interrupt-controller: identifies the node as an interrupt controller
33 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
34
35 Optional properties:
36 - marvell,#interrupts: number of interrupts provided by bridge interrupt
37 controller, defaults to 32 if not set
38
39 Example:
40 bridge_intc: interrupt-controller {
41 compatible = "marvell,orion-bridge-intc";
42 interrupt-controller;
43 #interrupt-cells = <1>;
44 reg = <0x20110 0x8>;
45 interrupts = <0>;
46 /* Dove bridge provides 5 interrupts */
47 marvell,#interrupts = <5>;
48 };
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