1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Freescale Pixel Pipeline
9
10 maintainers:
11 - Philipp Zabel <p.zabel@pengutronix.de>
12 - Michael Tretter <m.tretter@pengutronix.de>
13
14 description:
15 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
16 that supports scaling, colorspace conversion, alpha blending, rotation, and
17 pixel conversion via lookup table. Different versions are present on various
18 i.MX SoCs from i.MX23 to i.MX7.
19
20 properties:
21 compatible:
22 oneOf:
23 - enum:
24 - fsl,imx6ul-pxp
25 - fsl,imx6ull-pxp
26 - fsl,imx7d-pxp
27 - items:
28 - enum:
29 - fsl,imx6sll-pxp
30 - fsl,imx6sx-pxp
31 - const: fsl,imx6ull-pxp
32
33 reg:
34 maxItems: 1
35
36 interrupts:
37 minItems: 1
38 maxItems: 2
39
40 clocks:
41 maxItems: 1
42
43 clock-names:
44 const: axi
45
46 power-domains:
47 maxItems: 1
48
49 required:
50 - compatible
51 - reg
52 - interrupts
53 - clocks
54 - clock-names
55
56 allOf:
57 - if:
58 properties:
59 compatible:
60 contains:
61 enum:
62 - fsl,imx6sx-pxp
63 - fsl,imx6ul-pxp
64 then:
65 properties:
66 interrupts:
67 maxItems: 1
68 else:
69 properties:
70 interrupts:
71 minItems: 2
72 maxItems: 2
73
74 additionalProperties: false
75
76 examples:
77 - |
78 #include <dt-bindings/clock/imx6ul-clock.h>
79 #include <dt-bindings/interrupt-controller/arm-gic.h>
80
81 pxp: pxp@21cc000 {
82 compatible = "fsl,imx6ull-pxp";
83 reg = <0x021cc000 0x4000>;
84 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
85 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
86 clock-names = "axi";
87 clocks = <&clks IMX6UL_CLK_PXP>;
88 };
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