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Linux/Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-tcc.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: MediaTek Media Data Path 3 Tone Curve Conversion
  8 
  9 maintainers:
 10   - Matthias Brugger <matthias.bgg@gmail.com>
 11 
 12 description:
 13   Tone Curve Conversion (TCC) is one of Media Profile Path 3 (MDP3) components.
 14   It is used to handle the tone mapping of various gamma curves in order to
 15   achieve HDR10 effects. This helps adapt the content to the color and
 16   brightness range that standard display devices typically support.
 17 
 18 properties:
 19   compatible:
 20     enum:
 21       - mediatek,mt8195-mdp3-tcc
 22 
 23   reg:
 24     maxItems: 1
 25 
 26   mediatek,gce-client-reg:
 27     description:
 28       The register of display function block to be set by gce. There are 4 arguments,
 29       such as gce node, subsys id, offset and register size. The subsys id that is
 30       mapping to the register of display function blocks is defined in the gce header
 31       include/dt-bindings/gce/<chip>-gce.h of each chips.
 32     $ref: /schemas/types.yaml#/definitions/phandle-array
 33     items:
 34       items:
 35         - description: phandle of GCE
 36         - description: GCE subsys id
 37         - description: register offset
 38         - description: register size
 39     maxItems: 1
 40 
 41   clocks:
 42     maxItems: 1
 43 
 44 required:
 45   - compatible
 46   - reg
 47   - mediatek,gce-client-reg
 48   - clocks
 49 
 50 additionalProperties: false
 51 
 52 examples:
 53   - |
 54     #include <dt-bindings/clock/mt8195-clk.h>
 55     #include <dt-bindings/gce/mt8195-gce.h>
 56 
 57     display@1400b000 {
 58         compatible = "mediatek,mt8195-mdp3-tcc";
 59         reg = <0x1400b000 0x1000>;
 60         mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
 61         clocks = <&vppsys0 CLK_VPP0_MDP_TCC>;
 62     };

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