1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Hantro G1 VPU encoders implemented on Rockchip SoCs
9
10 maintainers:
11 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
12
13 description:
14 Hantro G1 video encode-only accelerators present on Rockchip SoCs.
15
16 properties:
17 compatible:
18 enum:
19 - rockchip,rk3568-vepu
20 - rockchip,rk3588-vepu121
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 clocks:
29 maxItems: 2
30
31 clock-names:
32 items:
33 - const: aclk
34 - const: hclk
35
36 power-domains:
37 maxItems: 1
38
39 iommus:
40 maxItems: 1
41
42 required:
43 - compatible
44 - reg
45 - interrupts
46 - clocks
47 - clock-names
48
49 additionalProperties: false
50
51 examples:
52 - |
53 #include <dt-bindings/clock/rk3568-cru.h>
54 #include <dt-bindings/interrupt-controller/arm-gic.h>
55 #include <dt-bindings/power/rk3568-power.h>
56
57 bus {
58 #address-cells = <2>;
59 #size-cells = <2>;
60
61 vepu: video-codec@fdee0000 {
62 compatible = "rockchip,rk3568-vepu";
63 reg = <0x0 0xfdee0000 0x0 0x800>;
64 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
65 clocks = <&cru ACLK_JENC>, <&cru HCLK_JENC>;
66 clock-names = "aclk", "hclk";
67 iommus = <&vepu_mmu>;
68 power-domains = <&power RK3568_PD_RGA>;
69 };
70 };
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