1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/mmdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale Multi Mode DDR controller (MMDC)
8
9 maintainers:
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
13
14 properties:
15 compatible:
16 oneOf:
17 - const: fsl,imx6q-mmdc
18 - items:
19 - enum:
20 - fsl,imx6qp-mmdc
21 - fsl,imx6sl-mmdc
22 - fsl,imx6sll-mmdc
23 - fsl,imx6sx-mmdc
24 - fsl,imx6ul-mmdc
25 - fsl,imx7ulp-mmdc
26 - const: fsl,imx6q-mmdc
27
28 reg:
29 maxItems: 1
30
31 clocks:
32 maxItems: 1
33
34 required:
35 - compatible
36 - reg
37
38 additionalProperties: false
39
40 examples:
41 - |
42 #include <dt-bindings/clock/imx6qdl-clock.h>
43
44 memory-controller@21b0000 {
45 compatible = "fsl,imx6q-mmdc";
46 reg = <0x021b0000 0x4000>;
47 clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
48 };
49
50 memory-controller@21b4000 {
51 compatible = "fsl,imx6q-mmdc";
52 reg = <0x021b4000 0x4000>;
53 };
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