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Linux/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Broadcom BCM6362 GPIO System Controller
  8 
  9 maintainers:
 10   - Álvaro Fernández Rojas <noltari@gmail.com>
 11   - Jonas Gorski <jonas.gorski@gmail.com>
 12 
 13 description:
 14   Broadcom BCM6362 SoC GPIO system controller which provides a register map
 15   for controlling the GPIO and pins of the SoC.
 16 
 17 properties:
 18   "#address-cells": true
 19 
 20   "#size-cells": true
 21 
 22   compatible:
 23     items:
 24       - const: brcm,bcm6362-gpio-sysctl
 25       - const: syscon
 26       - const: simple-mfd
 27 
 28   ranges:
 29     maxItems: 1
 30 
 31   reg:
 32     maxItems: 1
 33 
 34 patternProperties:
 35   "^gpio@[0-9a-f]+$":
 36     # Child node
 37     type: object
 38     $ref: /schemas/gpio/brcm,bcm63xx-gpio.yaml
 39     description:
 40       GPIO controller for the SoC GPIOs. This child node definition
 41       should follow the bindings specified in
 42       Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
 43 
 44   "^pinctrl@[0-9a-f]+$":
 45     # Child node
 46     type: object
 47     $ref: /schemas/pinctrl/brcm,bcm6362-pinctrl.yaml
 48     description:
 49       Pin controller for the SoC pins. This child node definition
 50       should follow the bindings specified in
 51       Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml.
 52 
 53 required:
 54   - "#address-cells"
 55   - compatible
 56   - ranges
 57   - reg
 58   - "#size-cells"
 59 
 60 additionalProperties: false
 61 
 62 examples:
 63   - |
 64     syscon@10000080 {
 65       #address-cells = <1>;
 66       #size-cells = <1>;
 67       compatible = "brcm,bcm6362-gpio-sysctl", "syscon", "simple-mfd";
 68       reg = <0x10000080 0x80>;
 69       ranges = <0 0x10000080 0x80>;
 70 
 71       gpio@0 {
 72         compatible = "brcm,bcm6362-gpio";
 73         reg-names = "dirout", "dat";
 74         reg = <0x0 0x8>, <0x8 0x8>;
 75 
 76         gpio-controller;
 77         gpio-ranges = <&pinctrl 0 0 48>;
 78         #gpio-cells = <2>;
 79       };
 80 
 81       pinctrl: pinctrl@18 {
 82         compatible = "brcm,bcm6362-pinctrl";
 83         reg = <0x18 0x10>, <0x38 0x4>;
 84 
 85         pinctrl_usb_device_led: usb_device_led-pins {
 86           function = "usb_device_led";
 87           pins = "gpio0";
 88         };
 89 
 90         pinctrl_sys_irq: sys_irq-pins {
 91           function = "sys_irq";
 92           pins = "gpio1";
 93         };
 94 
 95         pinctrl_serial_led: serial_led-pins {
 96           pinctrl_serial_led_clk: serial_led_clk-pins {
 97             function = "serial_led_clk";
 98             pins = "gpio2";
 99           };
100 
101           pinctrl_serial_led_data: serial_led_data-pins {
102             function = "serial_led_data";
103             pins = "gpio3";
104           };
105         };
106 
107         pinctrl_robosw_led_data: robosw_led_data-pins {
108           function = "robosw_led_data";
109           pins = "gpio4";
110         };
111 
112         pinctrl_robosw_led_clk: robosw_led_clk-pins {
113           function = "robosw_led_clk";
114           pins = "gpio5";
115         };
116 
117         pinctrl_robosw_led0: robosw_led0-pins {
118           function = "robosw_led0";
119           pins = "gpio6";
120         };
121 
122         pinctrl_robosw_led1: robosw_led1-pins {
123           function = "robosw_led1";
124           pins = "gpio7";
125         };
126 
127         pinctrl_inet_led: inet_led-pins {
128           function = "inet_led";
129           pins = "gpio8";
130         };
131 
132         pinctrl_spi_cs2: spi_cs2-pins {
133           function = "spi_cs2";
134           pins = "gpio9";
135         };
136 
137         pinctrl_spi_cs3: spi_cs3-pins {
138           function = "spi_cs3";
139           pins = "gpio10";
140         };
141 
142         pinctrl_ntr_pulse: ntr_pulse-pins {
143           function = "ntr_pulse";
144           pins = "gpio11";
145         };
146 
147         pinctrl_uart1_scts: uart1_scts-pins {
148           function = "uart1_scts";
149           pins = "gpio12";
150         };
151 
152         pinctrl_uart1_srts: uart1_srts-pins {
153           function = "uart1_srts";
154           pins = "gpio13";
155         };
156 
157         pinctrl_uart1: uart1-pins {
158           pinctrl_uart1_sdin: uart1_sdin-pins {
159             function = "uart1_sdin";
160             pins = "gpio14";
161           };
162 
163           pinctrl_uart1_sdout: uart1_sdout-pins {
164             function = "uart1_sdout";
165             pins = "gpio15";
166           };
167         };
168 
169         pinctrl_adsl_spi: adsl_spi-pins {
170           pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
171             function = "adsl_spi_miso";
172             pins = "gpio16";
173           };
174 
175           pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
176             function = "adsl_spi_mosi";
177             pins = "gpio17";
178           };
179 
180           pinctrl_adsl_spi_clk: adsl_spi_clk-pins {
181             function = "adsl_spi_clk";
182             pins = "gpio18";
183           };
184 
185           pinctrl_adsl_spi_cs: adsl_spi_cs-pins {
186             function = "adsl_spi_cs";
187             pins = "gpio19";
188           };
189         };
190 
191         pinctrl_ephy0_led: ephy0_led-pins {
192           function = "ephy0_led";
193           pins = "gpio20";
194         };
195 
196         pinctrl_ephy1_led: ephy1_led-pins {
197           function = "ephy1_led";
198           pins = "gpio21";
199         };
200 
201         pinctrl_ephy2_led: ephy2_led-pins {
202           function = "ephy2_led";
203           pins = "gpio22";
204         };
205 
206         pinctrl_ephy3_led: ephy3_led-pins {
207           function = "ephy3_led";
208           pins = "gpio23";
209         };
210 
211         pinctrl_ext_irq0: ext_irq0-pins {
212           function = "ext_irq0";
213           pins = "gpio24";
214         };
215 
216         pinctrl_ext_irq1: ext_irq1-pins {
217           function = "ext_irq1";
218           pins = "gpio25";
219         };
220 
221         pinctrl_ext_irq2: ext_irq2-pins {
222           function = "ext_irq2";
223           pins = "gpio26";
224         };
225 
226         pinctrl_ext_irq3: ext_irq3-pins {
227           function = "ext_irq3";
228           pins = "gpio27";
229         };
230 
231         pinctrl_nand: nand-pins {
232           function = "nand";
233           pins = "nand_grp";
234         };
235       };
236     };

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