1 * Microsemi MIPS CPUs
2
3 Boards with a SoC of the Microsemi MIPS family shall have the following
4 properties:
5
6 Required properties:
7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
8
9
10 * Other peripherals:
11
12 o CPU chip regs:
13
14 The SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous
15 functionalities: chip ID, general purpose register for software use, reset
16 controller, hardware status and configuration, efuses.
17
18 Required properties:
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
20 - reg : Should contain registers location and length
21
22 Example:
23 syscon@71070000 {
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
25 reg = <0x71070000 0x1c>;
26 };
27
28 o HSIO regs:
29
30 The SoC has a few registers (HSIO) handling miscellaneous functionalities:
31 configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
32 status, SerDes muxing and a thermal sensor.
33
34 Required properties:
35 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
36 - reg : Should contain registers location and length
37
38 Example:
39 syscon@10d0000 {
40 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
41 reg = <0x10d0000 0x10000>;
42 };
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