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Linux/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
  8 
  9 allOf:
 10   - $ref: nand-controller.yaml
 11 
 12 maintainers:
 13   - liang.yang@amlogic.com
 14 
 15 properties:
 16   compatible:
 17     enum:
 18       - amlogic,meson-gxl-nfc
 19       - amlogic,meson-axg-nfc
 20 
 21   reg:
 22     maxItems: 2
 23 
 24   reg-names:
 25     items:
 26       - const: nfc
 27       - const: emmc
 28 
 29   interrupts:
 30     maxItems: 1
 31 
 32   clocks:
 33     minItems: 2
 34 
 35   clock-names:
 36     items:
 37       - const: core
 38       - const: device
 39 
 40 patternProperties:
 41   "^nand@[0-7]$":
 42     type: object
 43     $ref: raw-nand-chip.yaml
 44     properties:
 45       reg:
 46         minimum: 0
 47         maximum: 1
 48 
 49       nand-ecc-mode:
 50         const: hw
 51 
 52       nand-ecc-step-size:
 53         enum: [512, 1024]
 54 
 55       nand-ecc-strength:
 56         enum: [8, 16, 24, 30, 40, 50, 60]
 57         description: |
 58           The ECC configurations that can be supported are as follows.
 59             meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
 60             meson-axg-nfc 8
 61 
 62       nand-rb:
 63         maxItems: 1
 64         items:
 65           maximum: 0
 66 
 67       amlogic,boot-pages:
 68         $ref: /schemas/types.yaml#/definitions/uint32
 69         description:
 70           Number of pages starting from offset 0, where a special ECC
 71           configuration must be used because it is accessed by the ROM
 72           code. This ECC configuration uses 384 bytes data blocks.
 73           Also scrambling mode is enabled for such pages.
 74 
 75       amlogic,boot-page-step:
 76         $ref: /schemas/types.yaml#/definitions/uint32
 77         description:
 78           Interval between pages, accessed by the ROM code. For example
 79           we have 8 pages [0, 7]. Pages 0,2,4,6 are accessed by the
 80           ROM code, so this field will be 2 (e.g. every 2nd page). Rest
 81           of pages - 1,3,5,7 are read/written without this mode.
 82 
 83     unevaluatedProperties: false
 84 
 85     dependencies:
 86       nand-ecc-strength: [nand-ecc-step-size]
 87       nand-ecc-step-size: [nand-ecc-strength]
 88       amlogic,boot-pages: [nand-is-boot-medium, "amlogic,boot-page-step"]
 89       amlogic,boot-page-step: [nand-is-boot-medium, "amlogic,boot-pages"]
 90 
 91 
 92 required:
 93   - compatible
 94   - reg
 95   - interrupts
 96   - clocks
 97   - clock-names
 98 
 99 unevaluatedProperties: false
100 
101 examples:
102   - |
103     #include <dt-bindings/clock/axg-clkc.h>
104     #include <dt-bindings/interrupt-controller/arm-gic.h>
105     nand-controller@ffe07800 {
106       compatible = "amlogic,meson-axg-nfc";
107       reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
108       reg-names = "nfc", "emmc";
109       interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
110       clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;
111       clock-names = "core", "device";
112 
113       pinctrl-0 = <&nand_pins>;
114       pinctrl-names = "default";
115 
116       #address-cells = <1>;
117       #size-cells = <0>;
118 
119       nand@0 {
120         reg = <0>;
121         nand-rb = <0>;
122       };
123     };
124 
125 ...

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