1 Device tree bindings for Texas instruments Davinci/Keystone NAND controller
2
3 This file provides information, what the device node for the davinci/keystone
4 NAND interface contains.
5
6 Documentation:
7 Davinci DM646x - https://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
8 Kestone - https://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
9
10 Required properties:
11
12 - compatible: "ti,davinci-nand"
13 "ti,keystone-nand"
14
15 - reg: Contains 2 offset/length values:
16 - offset and length for the access window.
17 - offset and length for accessing the AEMIF
18 control registers.
19
20 - ti,davinci-chipselect: number of chipselect. Indicates on the
21 davinci_nand driver which chipselect is used
22 for accessing the nand.
23 Can be in the range [0-3].
24
25 Recommended properties :
26
27 - ti,davinci-mask-ale: mask for ALE. Needed for executing address
28 phase. These offset will be added to the base
29 address for the chip select space the NAND Flash
30 device is connected to.
31 If not set equal to 0x08.
32
33 - ti,davinci-mask-cle: mask for CLE. Needed for executing command
34 phase. These offset will be added to the base
35 address for the chip select space the NAND Flash
36 device is connected to.
37 If not set equal to 0x10.
38
39 - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
40 addresses for given chipselect.
41
42 - nand-ecc-mode: operation mode of the NAND ecc mode. ECC mode
43 valid values for davinci driver:
44 - "none"
45 - "soft"
46 - "hw"
47
48 - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
49
50 - nand-bus-width: buswidth 8 or 16. If not present 8.
51
52 - nand-on-flash-bbt: use flash based bad block table support. OOB
53 identifier is saved in OOB area. If not present
54 false.
55
56 Deprecated properties:
57
58 - ti,davinci-ecc-mode: operation mode of the NAND ecc mode. ECC mode
59 valid values for davinci driver:
60 - "none"
61 - "soft"
62 - "hw"
63
64 - ti,davinci-nand-buswidth: buswidth 8 or 16. If not present 8.
65
66 - ti,davinci-nand-use-bbt: use flash based bad block table support. OOB
67 identifier is saved in OOB area. If not present
68 false.
69
70 Nand device bindings may contain additional sub-nodes describing partitions of
71 the address space. See mtd.yaml for more detail. The NAND Flash timing
72 values must be programmed in the chip select’s node of AEMIF
73 memory-controller (see Documentation/devicetree/bindings/memory-controllers/
74 davinci-aemif.txt).
75
76 Example(da850 EVM ):
77
78 nand_cs3@62000000 {
79 compatible = "ti,davinci-nand";
80 reg = <0x62000000 0x807ff
81 0x68000000 0x8000>;
82 ti,davinci-chipselect = <1>;
83 ti,davinci-mask-ale = <0>;
84 ti,davinci-mask-cle = <0>;
85 ti,davinci-mask-chipsel = <0>;
86 nand-ecc-mode = "hw";
87 ti,davinci-ecc-bits = <4>;
88 nand-on-flash-bbt;
89
90 partition@180000 {
91 label = "ubifs";
92 reg = <0x180000 0x7e80000>;
93 };
94 };
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