1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
8
9 maintainers:
10 - Rob Herring <robh@kernel.org>
11
12 description: |
13 Flash chips (Memory Technology Devices) are often used for solid state
14 file systems on embedded devices.
15
16 allOf:
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
19
20 properties:
21 compatible:
22 oneOf:
23 - items:
24 - enum:
25 - amd,s29gl01gp
26 - amd,s29gl032a
27 - amd,s29gl256n
28 - amd,s29gl512n
29 - arm,versatile-flash
30 - arm,vexpress-flash
31 - cortina,gemini-flash
32 - cypress,hyperflash
33 - ge,imp3a-firmware-mirror
34 - ge,imp3a-paged-flash
35 - gef,ppc9a-firmware-mirror
36 - gef,ppc9a-paged-flash
37 - gef,sbc310-firmware-mirror
38 - gef,sbc310-paged-flash
39 - gef,sbc610-firmware-mirror
40 - gef,sbc610-paged-flash
41 - intel,28f128j3
42 - intel,dt28f160
43 - intel,ixp4xx-flash
44 - intel,JS28F128
45 - intel,JS28F640
46 - intel,PC28F640P30T85
47 - numonyx,js28f00a
48 - numonyx,js28f128
49 - sst,sst39vf320
50 - xlnx,xps-mch-emc-2.00.a
51 - enum:
52 - cfi-flash
53 - jedec-flash
54 - items:
55 - enum:
56 - cypress,cy7c1019dv33-10zsxi
57 - arm,vexpress-psram
58 - const: mtd-ram
59 - enum:
60 - cfi-flash
61 - jedec-flash
62 - mtd-ram
63 - mtd-rom
64
65 reg:
66 description: |
67 It's possible to (optionally) define multiple "reg" tuples so that
68 non-identical chips can be described in one node.
69 minItems: 1
70 maxItems: 8
71
72 bank-width:
73 description: Width (in bytes) of the bank. Equal to the device width times
74 the number of interleaved chips.
75 $ref: /schemas/types.yaml#/definitions/uint32
76 enum: [ 1, 2, 4 ]
77
78 device-width:
79 description:
80 Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
81 $ref: /schemas/types.yaml#/definitions/uint32
82 enum: [ 1, 2 ]
83
84 no-unaligned-direct-access:
85 type: boolean
86 description: |
87 Disables the default direct mapping of the flash.
88
89 On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems
90 with JFFS2 usage, as the local bus (LPB) doesn't support unaligned
91 accesses as implemented in the JFFS2 code via memcpy(). By defining
92 "no-unaligned-direct-access", the flash will not be exposed directly to
93 the MTD users (e.g. JFFS2) any more.
94
95 linux,mtd-name:
96 description:
97 Allows specifying the mtd name for retro capability with physmap-flash
98 drivers as boot loader pass the mtd partition via the old device name
99 physmap-flash.
100 $ref: /schemas/types.yaml#/definitions/string
101
102 use-advanced-sector-protection:
103 type: boolean
104 description: |
105 Enables support for the advanced sector protection (Spansion: PPB -
106 Persistent Protection Bits) locking.
107
108 erase-size:
109 description: The chip's physical erase block size in bytes.
110 $ref: /schemas/types.yaml#/definitions/uint32
111
112 addr-gpios:
113 description:
114 List of GPIO descriptors that will be used to address the MSBs address
115 lines. The order goes from LSB to MSB.
116 minItems: 1
117 maxItems: 8
118
119 '#address-cells':
120 const: 1
121
122 '#size-cells':
123 const: 1
124
125 big-endian: true
126 little-endian: true
127
128 required:
129 - compatible
130 - reg
131
132 if:
133 properties:
134 compatible:
135 contains:
136 const: cortina,gemini-flash
137 then:
138 properties:
139 syscon:
140 $ref: /schemas/types.yaml#/definitions/phandle
141 description:
142 Phandle to the syscon controller
143 required:
144 - syscon
145
146 # FIXME: A parent bus may define timing properties
147 additionalProperties: true
148
149 examples:
150 - |
151
152 flash@ff000000 {
153 compatible = "cfi-flash";
154 reg = <0xff000000 0x01000000>;
155 bank-width = <4>;
156 device-width = <1>;
157
158 #address-cells = <1>;
159 #size-cells = <1>;
160 ranges = <0 0xff000000 0x01000000>;
161
162 fs@0 {
163 label = "fs";
164 reg = <0 0xf80000>;
165 };
166 firmware@f80000 {
167 label = "firmware";
168 reg = <0xf80000 0x80000>;
169 read-only;
170 };
171 };
172
173 - |
174 /* An example with multiple "reg" tuples */
175
176 flash@0 {
177 compatible = "intel,PC28F640P30T85", "cfi-flash";
178 reg = <0x00000000 0x02000000>,
179 <0x02000000 0x02000000>;
180 bank-width = <2>;
181
182 #address-cells = <1>;
183 #size-cells = <1>;
184 ranges = <0 0 0x04000000>;
185
186 partition@0 {
187 label = "test-part1";
188 reg = <0 0x04000000>;
189 };
190 };
191
192 - |
193 /* An example using SRAM */
194 bus {
195 #address-cells = <2>;
196 #size-cells = <1>;
197
198 sram@2,0 {
199 compatible = "mtd-ram";
200 reg = <2 0 0x00200000>;
201 bank-width = <2>;
202 };
203 };
204
205 - |
206 /* An example using addr-gpios */
207 #include <dt-bindings/gpio/gpio.h>
208
209 flash@20000000 {
210 compatible = "cfi-flash";
211 reg = <0x20000000 0x02000000>;
212 bank-width = <2>;
213 addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
214
215 #address-cells = <1>;
216 #size-cells = <1>;
217 ranges = <0 0x00000000 0x02000000>,
218 <1 0x02000000 0x02000000>;
219
220 partition@0 {
221 label = "test-part1";
222 reg = <0 0x04000000>;
223 };
224 };
225 ...
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