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Linux/Documentation/devicetree/bindings/net/asix,ax88796c.yaml

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  1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/net/asix,ax88796c.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: ASIX AX88796C SPI Ethernet Adapter
  8 
  9 maintainers:
 10   - Ɓukasz Stelmach <l.stelmach@samsung.com>
 11 
 12 description: |
 13   ASIX AX88796C is an Ethernet controller with a built in PHY. This
 14   describes SPI mode of the chip.
 15 
 16   The node for this driver must be a child node of an SPI controller,
 17   hence all mandatory properties described in
 18   ../spi/spi-controller.yaml must be specified.
 19 
 20 allOf:
 21   - $ref: ethernet-controller.yaml#
 22   - $ref: /schemas/spi/spi-peripheral-props.yaml
 23 
 24 properties:
 25   compatible:
 26     const: asix,ax88796c
 27 
 28   reg:
 29     maxItems: 1
 30 
 31   spi-max-frequency:
 32     maximum: 40000000
 33 
 34   interrupts:
 35     maxItems: 1
 36 
 37   reset-gpios:
 38     description:
 39       A GPIO line handling reset of the chip. As the line is active low,
 40       it should be marked GPIO_ACTIVE_LOW.
 41     maxItems: 1
 42 
 43   controller-data: true
 44   local-mac-address: true
 45   mac-address: true
 46 
 47 required:
 48   - compatible
 49   - reg
 50   - spi-max-frequency
 51   - interrupts
 52   - reset-gpios
 53 
 54 additionalProperties: false
 55 
 56 examples:
 57   # Artik5 eval board
 58   - |
 59     #include <dt-bindings/interrupt-controller/irq.h>
 60     #include <dt-bindings/gpio/gpio.h>
 61     spi {
 62         #address-cells = <1>;
 63         #size-cells = <0>;
 64 
 65         ethernet@0 {
 66             compatible = "asix,ax88796c";
 67             reg = <0x0>;
 68             local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
 69             interrupt-parent = <&gpx2>;
 70             interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 71             spi-max-frequency = <40000000>;
 72             reset-gpios = <&gpe0 2 GPIO_ACTIVE_LOW>;
 73         };
 74     };

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