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Linux/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
  8 
  9 maintainers:
 10   - Wolfgang Grandegger <wg@grandegger.com>
 11 
 12 properties:
 13   compatible:
 14     oneOf:
 15       - enum:
 16           - nxp,sja1000
 17           - technologic,sja1000
 18       - items:
 19           - enum:
 20               - renesas,r9a06g032-sja1000 # RZ/N1D
 21               - renesas,r9a06g033-sja1000 # RZ/N1S
 22           - const: renesas,rzn1-sja1000 # RZ/N1
 23 
 24   reg:
 25     maxItems: 1
 26 
 27   interrupts:
 28     maxItems: 1
 29 
 30   clocks:
 31     maxItems: 1
 32 
 33   power-domains:
 34     maxItems: 1
 35 
 36   reg-io-width:
 37     description: I/O register width (in bytes) implemented by this device
 38     default: 1
 39     enum: [ 1, 2, 4 ]
 40 
 41   nxp,external-clock-frequency:
 42     $ref: /schemas/types.yaml#/definitions/uint32
 43     default: 16000000
 44     description: |
 45       Frequency of the external oscillator clock in Hz.
 46       The internal clock frequency used by the SJA1000 is half of that value.
 47 
 48   nxp,tx-output-mode:
 49     $ref: /schemas/types.yaml#/definitions/uint32
 50     enum: [ 0, 1, 2, 3 ]
 51     default: 1
 52     description: |
 53       operation mode of the TX output control logic. Valid values are:
 54         <0> : bi-phase output mode
 55         <1> : normal output mode (default)
 56         <2> : test output mode
 57         <3> : clock output mode
 58 
 59   nxp,tx-output-config:
 60     $ref: /schemas/types.yaml#/definitions/uint32
 61     default: 0x02
 62     description: |
 63       TX output pin configuration. Valid values are any one of the below
 64       or combination of TX0 and TX1:
 65         <0x01> : TX0 invert
 66         <0x02> : TX0 pull-down (default)
 67         <0x04> : TX0 pull-up
 68         <0x06> : TX0 push-pull
 69         <0x08> : TX1 invert
 70         <0x10> : TX1 pull-down
 71         <0x20> : TX1 pull-up
 72         <0x30> : TX1 push-pull
 73 
 74   nxp,clock-out-frequency:
 75     $ref: /schemas/types.yaml#/definitions/uint32
 76     description: |
 77       clock frequency in Hz on the CLKOUT pin.
 78       If not specified or if the specified value is 0, the CLKOUT pin
 79       will be disabled.
 80 
 81   nxp,no-comparator-bypass:
 82     type: boolean
 83     description: Allows to disable the CAN input comparator.
 84 
 85 required:
 86   - compatible
 87   - reg
 88   - interrupts
 89 
 90 allOf:
 91   - $ref: can-controller.yaml#
 92   - if:
 93       properties:
 94         compatible:
 95           contains:
 96             enum:
 97               - technologic,sja1000
 98               - renesas,rzn1-sja1000
 99     then:
100       required:
101         - reg-io-width
102   - if:
103       properties:
104         compatible:
105           contains:
106             const: renesas,rzn1-sja1000
107     then:
108       required:
109         - clocks
110         - power-domains
111 
112 unevaluatedProperties: false
113 
114 examples:
115   - |
116     can@1a000 {
117         compatible = "technologic,sja1000";
118         reg = <0x1a000 0x100>;
119         interrupts = <1>;
120         reg-io-width = <2>;
121         nxp,tx-output-config = <0x06>;
122         nxp,external-clock-frequency = <24000000>;
123     };
124 
125   - |
126     #include <dt-bindings/interrupt-controller/arm-gic.h>
127     #include <dt-bindings/clock/r9a06g032-sysctrl.h>
128 
129     can@52104000 {
130         compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
131         reg = <0x52104000 0x800>;
132         reg-io-width = <4>;
133         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
134         clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
135         power-domains = <&sysctrl>;
136     };

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