1 4xx/Axon EMAC ethernet nodes
2
3 The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
4 the Axon bridge. To operate this needs to interact with a this
5 special McMAL DMA controller, and sometimes an RGMII or ZMII
6 interface. In addition to the nodes and properties described
7 below, the node for the OPB bus on which the EMAC sits must have a
8 correct clock-frequency property.
9
10 i) The EMAC node itself
11
12 Required properties:
13 - device_type : "network"
14
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
17 405gp, Axon) and second is either "ibm,emac" or
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
19 "ibm,emac4"
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
25 with this EMAC
26 - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated
27 with this EMAC
28 - cell-index : 1 cell, hardware index of the EMAC cell on a given
29 ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on
30 each Axon chip)
31 - max-frame-size : 1 cell, maximum frame size supported in bytes
32 - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec
33 operations.
34 For Axon, 2048
35 - tx-fifo-size : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec
36 operations.
37 For Axon, 2048.
38 - fifo-entry-size : 1 cell, size of a fifo entry (used to calculate
39 thresholds).
40 For Axon, 0x00000010
41 - mal-burst-size : 1 cell, MAL burst size (used to calculate thresholds)
42 in bytes.
43 For Axon, 0x00000100 (I think ...)
44 - phy-mode : string, mode of operations of the PHY interface.
45 Supported values are: "mii", "rmii", "smii", "rgmii",
46 "tbi", "gmii", rtbi", "sgmii".
47 For Axon on CAB, it is "rgmii"
48 - mdio-device : 1 cell, required iff using shared MDIO registers
49 (440EP). phandle of the EMAC to use to drive the
50 MDIO lines for the PHY used by this EMAC.
51 - zmii-device : 1 cell, required iff connected to a ZMII. phandle of
52 the ZMII device node
53 - zmii-channel : 1 cell, required iff connected to a ZMII. Which ZMII
54 channel or 0xffffffff if ZMII is only used for MDIO.
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
57 For Axon: phandle of plb5/plb4/opb/rgmii
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
60 Fox Axon: present, whatever value is appropriate for each
61 EMAC, that is the content of the current (bogus) "phy-port"
62 property.
63
64 Optional properties:
65 - phy-address : 1 cell, optional, MDIO address of the PHY. If absent,
66 a search is performed.
67 - phy-map : 1 cell, optional, bitmap of addresses to probe the PHY
68 for, used if phy-address is absent. bit 0x00000001 is
69 MDIO address 0.
70 For Axon it can be absent, though my current driver
71 doesn't handle phy-address yet so for now, keep
72 0x00ffffff in it.
73 - phy-handle : Used to describe configurations where a external PHY
74 is used. Please refer to:
75 Documentation/devicetree/bindings/net/ethernet.txt
76 - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec
77 operations (if absent the value is the same as
78 rx-fifo-size). For Axon, either absent or 2048.
79 - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec
80 operations (if absent the value is the same as
81 tx-fifo-size). For Axon, either absent or 2048.
82 - tah-device : 1 cell, optional. If connected to a TAH engine for
83 offload, phandle of the TAH device node.
84 - tah-channel : 1 cell, optional. If appropriate, channel used on the
85 TAH engine.
86 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
87 managed entity. See
88 Documentation/devicetree/bindings/net/fixed-link.txt
89 for details.
90 - mdio subnode : When the EMAC has a phy connected to its local
91 mdio, which us supported by the kernel's network
92 PHY library in drivers/net/phy, there must be device
93 tree subnode with the following required properties:
94 - #address-cells: Must be <1>.
95 - #size-cells: Must be <0>.
96
97 For PHY definitions: Please refer to
98 Documentation/devicetree/bindings/net/phy.txt and
99 Documentation/devicetree/bindings/net/ethernet.txt
100
101 Examples:
102
103 EMAC0: ethernet@40000800 {
104 device_type = "network";
105 compatible = "ibm,emac-440gp", "ibm,emac";
106 interrupt-parent = <&UIC1>;
107 interrupts = <1c 4 1d 4>;
108 reg = <40000800 70>;
109 local-mac-address = [00 04 AC E3 1B 1E];
110 mal-device = <&MAL0>;
111 mal-tx-channel = <0 1>;
112 mal-rx-channel = <0>;
113 cell-index = <0>;
114 max-frame-size = <5dc>;
115 rx-fifo-size = <1000>;
116 tx-fifo-size = <800>;
117 phy-mode = "rmii";
118 phy-map = <00000001>;
119 zmii-device = <&ZMII0>;
120 zmii-channel = <0>;
121 };
122
123 EMAC1: ethernet@ef600c00 {
124 device_type = "network";
125 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
126 interrupt-parent = <&EMAC1>;
127 interrupts = <0 1>;
128 #interrupt-cells = <1>;
129 #address-cells = <0>;
130 #size-cells = <0>;
131 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
132 1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
133 reg = <0xef600c00 0x000000c4>;
134 local-mac-address = [000000000000]; /* Filled in by U-Boot */
135 mal-device = <&MAL0>;
136 mal-tx-channel = <0>;
137 mal-rx-channel = <0>;
138 cell-index = <0>;
139 max-frame-size = <9000>;
140 rx-fifo-size = <16384>;
141 tx-fifo-size = <2048>;
142 fifo-entry-size = <10>;
143 phy-mode = "rgmii";
144 phy-handle = <&phy0>;
145 phy-map = <0x00000000>;
146 rgmii-device = <&RGMII0>;
147 rgmii-channel = <0>;
148 tah-device = <&TAH0>;
149 tah-channel = <0>;
150 has-inverted-stacr-oc;
151 has-new-stacr-staopc;
152
153 mdio {
154 #address-cells = <1>;
155 #size-cells = <0>;
156
157 phy0: ethernet-phy@0 {
158 compatible = "ethernet-phy-ieee802.3-c22";
159 reg = <0>;
160 };
161 };
162 };
163
164
165 ii) McMAL node
166
167 Required properties:
168 - device_type : "dma-controller"
169 - compatible : compatible list, containing 2 entries, first is
170 "ibm,mcmal-CHIP" where CHIP is the host ASIC (like
171 emac) and the second is either "ibm,mcmal" or
172 "ibm,mcmal2".
173 For Axon, "ibm,mcmal-axon","ibm,mcmal2"
174 - interrupts : <interrupt mapping for the MAL interrupts sources:
175 5 sources: tx_eob, rx_eob, serr, txde, rxde>.
176 For Axon: This is _different_ from the current
177 firmware. We use the "delayed" interrupts for txeob
178 and rxeob. Thus we end up with mapping those 5 MPIC
179 interrupts, all level positive sensitive: 10, 11, 32,
180 33, 34 (in decimal)
181 - dcr-reg : < DCR registers range >
182 - dcr-parent : if needed for dcr-reg
183 - num-tx-chans : 1 cell, number of Tx channels
184 - num-rx-chans : 1 cell, number of Rx channels
185
186 iii) ZMII node
187
188 Required properties:
189 - compatible : compatible list, containing 2 entries, first is
190 "ibm,zmii-CHIP" where CHIP is the host ASIC (like
191 EMAC) and the second is "ibm,zmii".
192 For Axon, there is no ZMII node.
193 - reg : <registers mapping>
194
195 iv) RGMII node
196
197 Required properties:
198 - compatible : compatible list, containing 2 entries, first is
199 "ibm,rgmii-CHIP" where CHIP is the host ASIC (like
200 EMAC) and the second is "ibm,rgmii".
201 For Axon, "ibm,rgmii-axon","ibm,rgmii"
202 - reg : <registers mapping>
203 - revision : as provided by the RGMII new version register if
204 available.
205 For Axon: 0x0000012a
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.