1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Intel DWMAC glue layer
8
9 maintainers:
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
11
12 select:
13 properties:
14 compatible:
15 contains:
16 enum:
17 - intel,keembay-dwmac
18 required:
19 - compatible
20
21 allOf:
22 - $ref: snps,dwmac.yaml#
23
24 properties:
25 compatible:
26 oneOf:
27 - items:
28 - enum:
29 - intel,keembay-dwmac
30 - const: snps,dwmac-4.10a
31
32 clocks:
33 items:
34 - description: GMAC main clock
35 - description: PTP reference clock
36 - description: Tx clock
37
38 clock-names:
39 items:
40 - const: stmmaceth
41 - const: ptp_ref
42 - const: tx_clk
43
44 required:
45 - compatible
46 - clocks
47 - clock-names
48
49 unevaluatedProperties: false
50
51 examples:
52 # FIXME: Remove defines and include the correct header file
53 # once it is available in mainline.
54 - |
55 #include <dt-bindings/interrupt-controller/arm-gic.h>
56 #include <dt-bindings/interrupt-controller/irq.h>
57 #define MOVISOC_KMB_PSS_GBE
58 #define MOVISOC_KMB_PSS_AUX_GBE_PTP
59 #define MOVISOC_KMB_PSS_AUX_GBE_TX
60
61 stmmac_axi_setup: stmmac-axi-config {
62 snps,lpi_en;
63 snps,wr_osr_lmt = <0x0>;
64 snps,rd_osr_lmt = <0x2>;
65 snps,blen = <0 0 0 0 16 8 4>;
66 };
67
68 mtl_rx_setup: rx-queues-config {
69 snps,rx-queues-to-use = <2>;
70 snps,rx-sched-sp;
71 queue0 {
72 snps,dcb-algorithm;
73 snps,map-to-dma-channel = <0x0>;
74 snps,priority = <0x0>;
75 };
76
77 queue1 {
78 snps,dcb-algorithm;
79 snps,map-to-dma-channel = <0x1>;
80 snps,priority = <0x1>;
81 };
82 };
83
84 mtl_tx_setup: tx-queues-config {
85 snps,tx-queues-to-use = <2>;
86 snps,tx-sched-wrr;
87 queue0 {
88 snps,weight = <0x10>;
89 snps,dcb-algorithm;
90 snps,priority = <0x0>;
91 };
92
93 queue1 {
94 snps,weight = <0x10>;
95 snps,dcb-algorithm;
96 snps,priority = <0x1>;
97 };
98 };
99
100 gmac0: ethernet@3a000000 {
101 compatible = "intel,keembay-dwmac", "snps,dwmac-4.10a";
102 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
103 interrupt-names = "macirq";
104 reg = <0x3a000000 0x8000>;
105 snps,perfect-filter-entries = <128>;
106 phy-handle = <ð_phy0>;
107 phy-mode = "rgmii";
108 rx-fifo-depth = <4096>;
109 tx-fifo-depth = <4096>;
110 clock-names = "stmmaceth", "ptp_ref", "tx_clk";
111 clocks = <&scmi_clk MOVISOC_KMB_PSS_GBE>,
112 <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_PTP>,
113 <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_TX>;
114 snps,pbl = <0x4>;
115 snps,axi-config = <&stmmac_axi_setup>;
116 snps,mtl-rx-config = <&mtl_rx_setup>;
117 snps,mtl-tx-config = <&mtl_tx_setup>;
118 snps,tso;
119
120 mdio {
121 #address-cells = <1>;
122 #size-cells = <0>;
123 compatible = "snps,dwmac-mdio";
124
125 ethernet-phy@0 {
126 reg = <0>;
127 };
128 };
129 };
130
131 ...
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