1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 StarFive Technology Co., Ltd.
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: StarFive JH7110 DWMAC glue layer
9
10 maintainers:
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
13
14 select:
15 properties:
16 compatible:
17 contains:
18 enum:
19 - starfive,jh7100-dwmac
20 - starfive,jh7110-dwmac
21 required:
22 - compatible
23
24 properties:
25 compatible:
26 oneOf:
27 - items:
28 - const: starfive,jh7100-dwmac
29 - const: snps,dwmac
30 - items:
31 - const: starfive,jh7110-dwmac
32 - const: snps,dwmac-5.20
33 - items:
34 - const: starfive,jh8100-dwmac
35 - const: starfive,jh7110-dwmac
36 - const: snps,dwmac-5.20
37
38 reg:
39 maxItems: 1
40
41 clocks:
42 items:
43 - description: GMAC main clock
44 - description: GMAC AHB clock
45 - description: PTP clock
46 - description: TX clock
47 - description: GTX clock
48
49 clock-names:
50 items:
51 - const: stmmaceth
52 - const: pclk
53 - const: ptp_ref
54 - const: tx
55 - const: gtx
56
57 starfive,tx-use-rgmii-clk:
58 description:
59 Tx clock is provided by external rgmii clock.
60 type: boolean
61
62 starfive,syscon:
63 $ref: /schemas/types.yaml#/definitions/phandle-array
64 items:
65 - items:
66 - description: phandle to syscon that configures phy mode
67 - description: Offset of phy mode selection
68 - description: Shift of phy mode selection
69 description:
70 A phandle to syscon with two arguments that configure phy mode.
71 The argument one is the offset of phy mode selection, the
72 argument two is the shift of phy mode selection.
73
74 required:
75 - compatible
76 - reg
77 - clocks
78 - clock-names
79 - interrupts
80 - interrupt-names
81 - resets
82 - reset-names
83
84 allOf:
85 - $ref: snps,dwmac.yaml#
86
87 - if:
88 properties:
89 compatible:
90 contains:
91 const: starfive,jh7100-dwmac
92 then:
93 properties:
94 interrupts:
95 minItems: 2
96 maxItems: 2
97
98 interrupt-names:
99 minItems: 2
100 maxItems: 2
101
102 resets:
103 maxItems: 1
104
105 reset-names:
106 const: ahb
107
108 - if:
109 properties:
110 compatible:
111 contains:
112 const: starfive,jh7110-dwmac
113 then:
114 properties:
115 interrupts:
116 minItems: 3
117 maxItems: 3
118
119 interrupt-names:
120 minItems: 3
121 maxItems: 3
122
123 if:
124 properties:
125 compatible:
126 contains:
127 const: starfive,jh8100-dwmac
128 then:
129 properties:
130 resets:
131 maxItems: 1
132
133 reset-names:
134 const: stmmaceth
135 else:
136 properties:
137 resets:
138 minItems: 2
139
140 reset-names:
141 minItems: 2
142
143 unevaluatedProperties: false
144
145 examples:
146 - |
147 ethernet@16030000 {
148 compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
149 reg = <0x16030000 0x10000>;
150 clocks = <&clk 3>, <&clk 2>, <&clk 109>,
151 <&clk 6>, <&clk 111>;
152 clock-names = "stmmaceth", "pclk", "ptp_ref",
153 "tx", "gtx";
154 resets = <&rst 1>, <&rst 2>;
155 reset-names = "stmmaceth", "ahb";
156 interrupts = <7>, <6>, <5>;
157 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
158 phy-mode = "rgmii-id";
159 snps,multicast-filter-bins = <64>;
160 snps,perfect-filter-entries = <8>;
161 rx-fifo-depth = <2048>;
162 tx-fifo-depth = <2048>;
163 snps,fixed-burst;
164 snps,no-pbl-x8;
165 snps,tso;
166 snps,force_thresh_dma_mode;
167 snps,axi-config = <&stmmac_axi_setup>;
168 snps,en-tx-lpi-clockgating;
169 snps,txpbl = <16>;
170 snps,rxpbl = <16>;
171 starfive,syscon = <&aon_syscon 0xc 0x12>;
172 phy-handle = <&phy0>;
173
174 mdio {
175 #address-cells = <1>;
176 #size-cells = <0>;
177 compatible = "snps,dwmac-mdio";
178
179 phy0: ethernet-phy@0 {
180 reg = <0>;
181 };
182 };
183
184 stmmac_axi_setup: stmmac-axi-config {
185 snps,lpi_en;
186 snps,wr_osr_lmt = <4>;
187 snps,rd_osr_lmt = <4>;
188 snps,blen = <256 128 64 32 0 0 0>;
189 };
190 };
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