1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/net/ti,dp83869.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: TI DP83869 ethernet PHY
9
10 allOf:
11 - $ref: ethernet-phy.yaml#
12
13 maintainers:
14 - Andrew Davis <afd@ti.com>
15
16 description: |
17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
20 100BASE-FX Fiber protocols.
21 This device interfaces to the MAC layer through Reduced GMII (RGMII) and
22 SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode,
23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
24 conversions. The DP83869HM can also support Bridge Conversion from RGMII to
25 SGMII and SGMII to RGMII.
26
27 Specifications about the Ethernet PHY can be found at:
28 http://www.ti.com/lit/ds/symlink/dp83869hm.pdf
29
30 properties:
31 reg:
32 maxItems: 1
33
34 ti,min-output-impedance:
35 type: boolean
36 description: |
37 MAC Interface Impedance control to set the programmable output impedance
38 to a minimum value (35 ohms).
39
40 ti,max-output-impedance:
41 type: boolean
42 description: |
43 MAC Interface Impedance control to set the programmable output impedance
44 to a maximum value (70 ohms).
45
46 tx-fifo-depth:
47 $ref: /schemas/types.yaml#/definitions/uint32
48 description: |
49 Transmitt FIFO depth see dt-bindings/net/ti-dp83869.h for values
50
51 rx-fifo-depth:
52 $ref: /schemas/types.yaml#/definitions/uint32
53 description: |
54 Receive FIFO depth see dt-bindings/net/ti-dp83869.h for values
55
56 ti,clk-output-sel:
57 $ref: /schemas/types.yaml#/definitions/uint32
58 description: |
59 Muxing option for CLK_OUT pin see dt-bindings/net/ti-dp83869.h for values.
60
61 ti,op-mode:
62 $ref: /schemas/types.yaml#/definitions/uint32
63 description: |
64 Operational mode for the PHY. If this is not set then the operational
65 mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values
66
67 rx-internal-delay-ps:
68 description: Delay is in pico seconds
69 enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
70 3250, 3500, 3750, 4000 ]
71 default: 2000
72
73 tx-internal-delay-ps:
74 description: Delay is in pico seconds
75 enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
76 3250, 3500, 3750, 4000 ]
77 default: 2000
78
79 required:
80 - reg
81
82 unevaluatedProperties: false
83
84 examples:
85 - |
86 #include <dt-bindings/net/ti-dp83869.h>
87 mdio0 {
88 #address-cells = <1>;
89 #size-cells = <0>;
90 ethphy0: ethernet-phy@0 {
91 reg = <0>;
92 tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
93 rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
94 ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>;
95 ti,max-output-impedance;
96 ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
97 rx-internal-delay-ps = <2000>;
98 tx-internal-delay-ps = <2000>;
99 };
100 };
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