1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/nvmem/nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVMEM (Non Volatile Memory)
8
9 maintainers:
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12 description: |
13 This binding is intended to represent the location of hardware
14 configuration data stored in NVMEMs like eeprom, efuses and so on.
15
16 On a significant proportion of boards, the manufacturer has stored
17 some data on NVMEM, for the OS to be able to retrieve these
18 information and act upon it. Obviously, the OS has to know about
19 where to retrieve these data from, and where they are stored on the
20 storage device.
21
22 properties:
23 "#address-cells":
24 const: 1
25
26 "#size-cells":
27 const: 1
28
29 read-only:
30 $ref: /schemas/types.yaml#/definitions/flag
31 description:
32 Mark the provider as read only.
33
34 wp-gpios:
35 description:
36 GPIO to which the write-protect pin of the chip is connected.
37 The write-protect GPIO is asserted, when it's driven high
38 (logical '1') to block the write operation. It's deasserted,
39 when it's driven low (logical '0') to allow writing.
40 maxItems: 1
41
42 nvmem-layout:
43 $ref: /schemas/nvmem/layouts/nvmem-layout.yaml
44 description:
45 Alternative to the statically defined nvmem cells, this
46 container may reference more advanced (dynamic) layout
47 parsers.
48
49 additionalProperties: true
50
51 examples:
52 - |
53 #include <dt-bindings/gpio/gpio.h>
54
55 qfprom: eeprom@700000 {
56 compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 reg = <0x00700000 0x100000>;
60
61 wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
62
63 /* ... */
64
65 nvmem-layout {
66 compatible = "fixed-layout";
67 #address-cells = <1>;
68 #size-cells = <1>;
69
70 /* Data cells */
71 tsens_calibration: calib@404 {
72 reg = <0x404 0x10>;
73 };
74
75 tsens_calibration_bckp: calib_bckp@504 {
76 reg = <0x504 0x11>;
77 bits = <6 128>;
78 };
79
80 pvs_version: pvs-version@6 {
81 reg = <0x6 0x2>;
82 bits = <7 2>;
83 };
84
85 speed_bin: speed-bin@c{
86 reg = <0xc 0x1>;
87 bits = <2 3>;
88 };
89 };
90 };
91
92 ...
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