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Linux/Documentation/devicetree/bindings/pci/83xx-512x-pci.txt

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  1 * Freescale 83xx and 512x PCI bridges
  2 
  3 Freescale 83xx and 512x SOCs include the same PCI bridge core.
  4 
  5 83xx/512x specific notes:
  6 - reg: should contain two address length tuples
  7     The first is for the internal PCI bridge registers
  8     The second is for the PCI config space access registers
  9 
 10 Example (MPC8313ERDB)
 11         pci0: pci@e0008500 {
 12                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 13                 interrupt-map = <
 14                                 /* IDSEL 0x0E -mini PCI */
 15                                  0x7000 0x0 0x0 0x1 &ipic 18 0x8
 16                                  0x7000 0x0 0x0 0x2 &ipic 18 0x8
 17                                  0x7000 0x0 0x0 0x3 &ipic 18 0x8
 18                                  0x7000 0x0 0x0 0x4 &ipic 18 0x8
 19 
 20                                 /* IDSEL 0x0F - PCI slot */
 21                                  0x7800 0x0 0x0 0x1 &ipic 17 0x8
 22                                  0x7800 0x0 0x0 0x2 &ipic 18 0x8
 23                                  0x7800 0x0 0x0 0x3 &ipic 17 0x8
 24                                  0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
 25                 interrupt-parent = <&ipic>;
 26                 interrupts = <66 0x8>;
 27                 bus-range = <0x0 0x0>;
 28                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 29                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 30                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 31                 clock-frequency = <66666666>;
 32                 #interrupt-cells = <1>;
 33                 #size-cells = <2>;
 34                 #address-cells = <3>;
 35                 reg = <0xe0008500 0x100         /* internal registers */
 36                        0xe0008300 0x8>;         /* config space access registers */
 37                 compatible = "fsl,mpc8349-pci";
 38                 device_type = "pci";
 39         };

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