1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale i.MX6 PCIe RC/EP controller
8
9 maintainers:
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
12
13 description:
14 Generic Freescale i.MX PCIe Root Port and Endpoint controller
15 properties.
16
17 properties:
18 clocks:
19 minItems: 3
20 maxItems: 4
21
22 clock-names:
23 minItems: 3
24 maxItems: 4
25
26 num-lanes:
27 const: 1
28
29 fsl,imx7d-pcie-phy:
30 $ref: /schemas/types.yaml#/definitions/phandle
31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional
32 required properties for imx7d-pcie, imx7d-pcie-ep, imx8mq-pcie,
33 and imx8mq-pcie-ep.
34
35 power-domains:
36 minItems: 1
37 items:
38 - description: The phandle pointing to the DISPLAY domain for
39 imx6sx-pcie, imx6sx-pcie-ep, to PCIE_PHY power domain for
40 imx7d-pcie, imx7d-pcie-ep, imx8mq-pcie and imx8mq-pcie-ep.
41 - description: The phandle pointing to the PCIE_PHY power domains
42 for imx6sx-pcie and imx6sx-pcie-ep.
43
44 power-domain-names:
45 minItems: 1
46 items:
47 - const: pcie
48 - const: pcie_phy
49
50 resets:
51 minItems: 2
52 maxItems: 3
53 description: Phandles to PCIe-related reset lines exposed by SRC
54 IP block. Additional required by imx7d-pcie, imx7d-pcie-ep,
55 imx8mq-pcie, and imx8mq-pcie-ep.
56
57 reset-names:
58 minItems: 2
59 maxItems: 3
60
61 fsl,tx-deemph-gen1:
62 description: Gen1 De-emphasis value (optional required).
63 $ref: /schemas/types.yaml#/definitions/uint32
64 default: 0
65
66 fsl,tx-deemph-gen2-3p5db:
67 description: Gen2 (3.5db) De-emphasis value (optional required).
68 $ref: /schemas/types.yaml#/definitions/uint32
69 default: 0
70
71 fsl,tx-deemph-gen2-6db:
72 description: Gen2 (6db) De-emphasis value (optional required).
73 $ref: /schemas/types.yaml#/definitions/uint32
74 default: 20
75
76 fsl,tx-swing-full:
77 description: Gen2 TX SWING FULL value (optional required).
78 $ref: /schemas/types.yaml#/definitions/uint32
79 default: 127
80
81 fsl,tx-swing-low:
82 description: TX launch amplitude swing_low value (optional required).
83 $ref: /schemas/types.yaml#/definitions/uint32
84 default: 127
85
86 fsl,max-link-speed:
87 description: Specify PCI Gen for link capability (optional required).
88 Note that the IMX6 LVDS clock outputs do not meet gen2 jitter
89 requirements and thus for gen2 capability a gen2 compliant clock
90 generator should be used and configured.
91 $ref: /schemas/types.yaml#/definitions/uint32
92 enum: [1, 2, 3, 4]
93 default: 1
94
95 phys:
96 maxItems: 1
97
98 phy-names:
99 const: pcie-phy
100
101 vpcie-supply:
102 description: Should specify the regulator in charge of PCIe port power.
103 The regulator will be enabled when initializing the PCIe host and
104 disabled either as part of the init process or when shutting down
105 the host (optional required).
106
107 vph-supply:
108 description: Should specify the regulator in charge of VPH one of
109 the three PCIe PHY powers. This regulator can be supplied by both
110 1.8v and 3.3v voltage supplies (optional required).
111
112 required:
113 - clocks
114 - clock-names
115 - num-lanes
116
117 allOf:
118 - if:
119 properties:
120 compatible:
121 contains:
122 enum:
123 - fsl,imx6sx-pcie
124 - fsl,imx6sx-pcie-ep
125 then:
126 properties:
127 clock-names:
128 items:
129 - {}
130 - {}
131 - const: pcie_phy
132 - const: pcie_inbound_axi
133 power-domains:
134 minItems: 2
135 power-domain-names:
136 minItems: 2
137
138 - if:
139 properties:
140 compatible:
141 contains:
142 enum:
143 - fsl,imx8mq-pcie
144 - fsl,imx8mq-pcie-ep
145 then:
146 properties:
147 clock-names:
148 items:
149 - {}
150 - {}
151 - const: pcie_phy
152 - const: pcie_aux
153
154 - if:
155 properties:
156 compatible:
157 contains:
158 enum:
159 - fsl,imx6q-pcie
160 - fsl,imx6qp-pcie
161 - fsl,imx7d-pcie
162 - fsl,imx6q-pcie-ep
163 - fsl,imx6qp-pcie-ep
164 - fsl,imx7d-pcie-ep
165 then:
166 properties:
167 clock-names:
168 maxItems: 3
169 contains:
170 const: pcie_phy
171
172 - if:
173 properties:
174 compatible:
175 contains:
176 enum:
177 - fsl,imx8mm-pcie
178 - fsl,imx8mp-pcie
179 - fsl,imx8mm-pcie-ep
180 - fsl,imx8mp-pcie-ep
181 then:
182 properties:
183 clock-names:
184 maxItems: 3
185 contains:
186 const: pcie_aux
187 - if:
188 properties:
189 compatible:
190 contains:
191 enum:
192 - fsl,imx6q-pcie
193 - fsl,imx6qp-pcie
194 - fsl,imx6q-pcie-ep
195 - fsl,imx6qp-pcie-ep
196 then:
197 properties:
198 power-domains: false
199 power-domain-names: false
200
201 - if:
202 not:
203 properties:
204 compatible:
205 contains:
206 enum:
207 - fsl,imx6sx-pcie
208 - fsl,imx6q-pcie
209 - fsl,imx6qp-pcie
210 - fsl,imx95-pcie
211 - fsl,imx6sx-pcie-ep
212 - fsl,imx6q-pcie-ep
213 - fsl,imx6qp-pcie-ep
214 then:
215 properties:
216 power-domains:
217 maxItems: 1
218 power-domain-names: false
219
220 - if:
221 properties:
222 compatible:
223 contains:
224 enum:
225 - fsl,imx6q-pcie
226 - fsl,imx6sx-pcie
227 - fsl,imx6qp-pcie
228 - fsl,imx7d-pcie
229 - fsl,imx8mq-pcie
230 - fsl,imx6q-pcie-ep
231 - fsl,imx6sx-pcie-ep
232 - fsl,imx6qp-pcie-ep
233 - fsl,imx7d-pcie-ep
234 - fsl,imx8mq-pcie-ep
235 then:
236 properties:
237 resets:
238 minItems: 3
239 reset-names:
240 items:
241 - const: pciephy
242 - const: apps
243 - const: turnoff
244 else:
245 properties:
246 resets:
247 maxItems: 2
248 reset-names:
249 items:
250 - const: apps
251 - const: turnoff
252
253 additionalProperties: true
254
255 ...
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