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TOMOYO Linux Cross Reference
Linux/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie-ep.yaml

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  1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2
  3 ---
  4 $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie-ep.yaml#
  5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6 
  7 title: Freescale Layerscape PCIe Endpoint(EP) controller
  8 
  9 maintainers:
 10   - Frank Li <Frank.Li@nxp.com>
 11 
 12 description:
 13   This PCIe EP controller is based on the Synopsys DesignWare PCIe IP.
 14 
 15   This controller derives its clocks from the Reset Configuration Word (RCW)
 16   which is used to describe the PLL settings at the time of chip-reset.
 17 
 18   Also as per the available Reference Manuals, there is no specific 'version'
 19   register available in the Freescale PCIe controller register set,
 20   which can allow determining the underlying DesignWare PCIe controller version
 21   information.
 22 
 23 properties:
 24   compatible:
 25     enum:
 26       - fsl,ls2088a-pcie-ep
 27       - fsl,ls1088a-pcie-ep
 28       - fsl,ls1046a-pcie-ep
 29       - fsl,ls1028a-pcie-ep
 30       - fsl,lx2160ar2-pcie-ep
 31 
 32   reg:
 33     maxItems: 2
 34 
 35   reg-names:
 36     items:
 37       - const: regs
 38       - const: addr_space
 39 
 40   fsl,pcie-scfg:
 41     $ref: /schemas/types.yaml#/definitions/phandle
 42     description: A phandle to the SCFG device node. The second entry is the
 43       physical PCIe controller index starting from '0'. This is used to get
 44       SCFG PEXN registers.
 45 
 46   big-endian:
 47     $ref: /schemas/types.yaml#/definitions/flag
 48     description: If the PEX_LUT and PF register block is in big-endian, specify
 49       this property.
 50 
 51   dma-coherent: true
 52 
 53   interrupts:
 54     minItems: 1
 55     maxItems: 2
 56 
 57   interrupt-names:
 58     minItems: 1
 59     maxItems: 2
 60 
 61 required:
 62   - compatible
 63   - reg
 64   - reg-names
 65 
 66 allOf:
 67   - if:
 68       properties:
 69         compatible:
 70           enum:
 71             - fsl,ls1028a-pcie-ep
 72             - fsl,ls1046a-pcie-ep
 73             - fsl,ls1088a-pcie-ep
 74     then:
 75       properties:
 76         interrupt-names:
 77           items:
 78             - const: pme
 79 
 80 unevaluatedProperties: false
 81 
 82 examples:
 83   - |
 84     #include <dt-bindings/interrupt-controller/arm-gic.h>
 85 
 86     soc {
 87       #address-cells = <2>;
 88       #size-cells = <2>;
 89 
 90       pcie_ep1: pcie-ep@3400000 {
 91         compatible = "fsl,ls1028a-pcie-ep";
 92         reg = <0x00 0x03400000 0x0 0x00100000
 93               0x80 0x00000000 0x8 0x00000000>;
 94         reg-names = "regs", "addr_space";
 95         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */
 96         interrupt-names = "pme";
 97         num-ib-windows = <6>;
 98         num-ob-windows = <8>;
 99         status = "disabled";
100       };
101     };
102 ...

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