1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Allwinner A10 USB PHY
8
9 maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13 properties:
14 "#phy-cells":
15 const: 1
16
17 compatible:
18 enum:
19 - allwinner,sun4i-a10-usb-phy
20 - allwinner,sun7i-a20-usb-phy
21
22 reg:
23 items:
24 - description: PHY Control registers
25 - description: PHY PMU1 registers
26 - description: PHY PMU2 registers
27
28 reg-names:
29 items:
30 - const: phy_ctrl
31 - const: pmu1
32 - const: pmu2
33
34 clocks:
35 maxItems: 1
36 description: USB PHY bus clock
37
38 clock-names:
39 const: usb_phy
40
41 resets:
42 items:
43 - description: USB OTG reset
44 - description: USB Host 1 Controller reset
45 - description: USB Host 2 Controller reset
46
47 reset-names:
48 items:
49 - const: usb0_reset
50 - const: usb1_reset
51 - const: usb2_reset
52
53 usb0_id_det-gpios:
54 maxItems: 1
55 description: GPIO to the USB OTG ID pin
56
57 usb0_vbus_det-gpios:
58 maxItems: 1
59 description: GPIO to the USB OTG VBUS detect pin
60
61 usb0_vbus_power-supply:
62 description: Power supply to detect the USB OTG VBUS
63
64 usb0_vbus-supply:
65 description: Regulator controlling USB OTG VBUS
66
67 usb1_vbus-supply:
68 description: Regulator controlling USB1 Host controller
69
70 usb2_vbus-supply:
71 description: Regulator controlling USB2 Host controller
72
73 required:
74 - "#phy-cells"
75 - compatible
76 - clocks
77 - clock-names
78 - reg
79 - reg-names
80 - resets
81 - reset-names
82
83 additionalProperties: false
84
85 examples:
86 - |
87 #include <dt-bindings/gpio/gpio.h>
88 #include <dt-bindings/clock/sun4i-a10-ccu.h>
89 #include <dt-bindings/reset/sun4i-a10-ccu.h>
90
91 usbphy: phy@1c13400 {
92 #phy-cells = <1>;
93 compatible = "allwinner,sun4i-a10-usb-phy";
94 reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
95 reg-names = "phy_ctrl", "pmu1", "pmu2";
96 clocks = <&ccu CLK_USB_PHY>;
97 clock-names = "usb_phy";
98 resets = <&ccu RST_USB_PHY0>,
99 <&ccu RST_USB_PHY1>,
100 <&ccu RST_USB_PHY2>;
101 reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
102 usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>;
103 usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>;
104 usb0_vbus-supply = <®_usb0_vbus>;
105 usb1_vbus-supply = <®_usb1_vbus>;
106 usb2_vbus-supply = <®_usb2_vbus>;
107 };
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