1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Allwinner A31 USB PHY
8
9 maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13 properties:
14 "#phy-cells":
15 const: 1
16
17 compatible:
18 const: allwinner,sun6i-a31-usb-phy
19
20 reg:
21 items:
22 - description: PHY Control registers
23 - description: PHY PMU1 registers
24 - description: PHY PMU2 registers
25
26 reg-names:
27 items:
28 - const: phy_ctrl
29 - const: pmu1
30 - const: pmu2
31
32 clocks:
33 items:
34 - description: USB OTG PHY bus clock
35 - description: USB Host 0 PHY bus clock
36 - description: USB Host 1 PHY bus clock
37
38 clock-names:
39 items:
40 - const: usb0_phy
41 - const: usb1_phy
42 - const: usb2_phy
43
44 resets:
45 items:
46 - description: USB OTG reset
47 - description: USB Host 1 Controller reset
48 - description: USB Host 2 Controller reset
49
50 reset-names:
51 items:
52 - const: usb0_reset
53 - const: usb1_reset
54 - const: usb2_reset
55
56 usb0_id_det-gpios:
57 maxItems: 1
58 description: GPIO to the USB OTG ID pin
59
60 usb0_vbus_det-gpios:
61 maxItems: 1
62 description: GPIO to the USB OTG VBUS detect pin
63
64 usb0_vbus_power-supply:
65 description: Power supply to detect the USB OTG VBUS
66
67 usb0_vbus-supply:
68 description: Regulator controlling USB OTG VBUS
69
70 usb1_vbus-supply:
71 description: Regulator controlling USB1 Host controller
72
73 usb2_vbus-supply:
74 description: Regulator controlling USB2 Host controller
75
76 required:
77 - "#phy-cells"
78 - compatible
79 - clocks
80 - clock-names
81 - reg
82 - reg-names
83 - resets
84 - reset-names
85
86 additionalProperties: false
87
88 examples:
89 - |
90 #include <dt-bindings/gpio/gpio.h>
91 #include <dt-bindings/clock/sun6i-a31-ccu.h>
92 #include <dt-bindings/reset/sun6i-a31-ccu.h>
93
94 phy@1c19400 {
95 #phy-cells = <1>;
96 compatible = "allwinner,sun6i-a31-usb-phy";
97 reg = <0x01c19400 0x10>,
98 <0x01c1a800 0x4>,
99 <0x01c1b800 0x4>;
100 reg-names = "phy_ctrl",
101 "pmu1",
102 "pmu2";
103 clocks = <&ccu CLK_USB_PHY0>,
104 <&ccu CLK_USB_PHY1>,
105 <&ccu CLK_USB_PHY2>;
106 clock-names = "usb0_phy",
107 "usb1_phy",
108 "usb2_phy";
109 resets = <&ccu RST_USB_PHY0>,
110 <&ccu RST_USB_PHY1>,
111 <&ccu RST_USB_PHY2>;
112 reset-names = "usb0_reset",
113 "usb1_reset",
114 "usb2_reset";
115 usb0_id_det-gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
116 usb0_vbus_det-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
117 usb0_vbus_power-supply = <&usb_power_supply>;
118 usb0_vbus-supply = <®_drivevbus>;
119 usb1_vbus-supply = <®_usb1_vbus>;
120 usb2_vbus-supply = <®_usb2_vbus>;
121 };
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