1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Allwinner R40 USB PHY
8
9 maintainers:
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
12
13 properties:
14 "#phy-cells":
15 const: 1
16
17 compatible:
18 const: allwinner,sun8i-r40-usb-phy
19
20 reg:
21 items:
22 - description: PHY Control registers
23 - description: PHY PMU0 registers
24 - description: PHY PMU1 registers
25 - description: PHY PMU2 registers
26
27 reg-names:
28 items:
29 - const: phy_ctrl
30 - const: pmu0
31 - const: pmu1
32 - const: pmu2
33
34 clocks:
35 items:
36 - description: USB OTG PHY bus clock
37 - description: USB Host 0 PHY bus clock
38 - description: USB Host 1 PHY bus clock
39
40 clock-names:
41 items:
42 - const: usb0_phy
43 - const: usb1_phy
44 - const: usb2_phy
45
46 resets:
47 items:
48 - description: USB OTG reset
49 - description: USB Host 1 Controller reset
50 - description: USB Host 2 Controller reset
51
52 reset-names:
53 items:
54 - const: usb0_reset
55 - const: usb1_reset
56 - const: usb2_reset
57
58 usb0_id_det-gpios:
59 maxItems: 1
60 description: GPIO to the USB OTG ID pin
61
62 usb0_vbus_det-gpios:
63 maxItems: 1
64 description: GPIO to the USB OTG VBUS detect pin
65
66 usb0_vbus_power-supply:
67 description: Power supply to detect the USB OTG VBUS
68
69 usb0_vbus-supply:
70 description: Regulator controlling USB OTG VBUS
71
72 usb1_vbus-supply:
73 description: Regulator controlling USB1 Host controller
74
75 usb2_vbus-supply:
76 description: Regulator controlling USB2 Host controller
77
78 required:
79 - "#phy-cells"
80 - compatible
81 - clocks
82 - clock-names
83 - reg
84 - reg-names
85 - resets
86 - reset-names
87
88 additionalProperties: false
89
90 examples:
91 - |
92 #include <dt-bindings/gpio/gpio.h>
93 #include <dt-bindings/clock/sun8i-r40-ccu.h>
94 #include <dt-bindings/reset/sun8i-r40-ccu.h>
95
96 phy@1c13400 {
97 #phy-cells = <1>;
98 compatible = "allwinner,sun8i-r40-usb-phy";
99 reg = <0x01c13400 0x14>,
100 <0x01c14800 0x4>,
101 <0x01c19800 0x4>,
102 <0x01c1c800 0x4>;
103 reg-names = "phy_ctrl",
104 "pmu0",
105 "pmu1",
106 "pmu2";
107 clocks = <&ccu CLK_USB_PHY0>,
108 <&ccu CLK_USB_PHY1>,
109 <&ccu CLK_USB_PHY2>;
110 clock-names = "usb0_phy",
111 "usb1_phy",
112 "usb2_phy";
113 resets = <&ccu RST_USB_PHY0>,
114 <&ccu RST_USB_PHY1>,
115 <&ccu RST_USB_PHY2>;
116 reset-names = "usb0_reset",
117 "usb1_reset",
118 "usb2_reset";
119 usb1_vbus-supply = <®_vcc5v0>;
120 usb2_vbus-supply = <®_vcc5v0>;
121 };
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