1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Marvell Armada CP110/CP115 UTMI PHY
9
10 maintainers:
11 - Konstantin Porotchkin <kostap@marvell.com>
12
13 description:
14 On Armada 7k/8k and CN913x, there are two host and one device USB controllers.
15 Each of two exiting UTMI PHYs could be connected to either USB host or USB device
16 controller.
17 The USB device controller can only be connected to a single UTMI PHY port
18 0.H----- USB HOST0
19 UTMI PHY0 --------/
20 0.D-----0
21 \------ USB DEVICE
22 1.D-----1
23 UTMI PHY1 --------\
24 1.H----- USB HOST1
25
26 properties:
27 compatible:
28 const: marvell,cp110-utmi-phy
29
30 reg:
31 maxItems: 1
32
33 "#address-cells":
34 const: 1
35
36 "#size-cells":
37 const: 0
38
39 marvell,system-controller:
40 description:
41 Phandle to the system controller node
42 $ref: /schemas/types.yaml#/definitions/phandle
43
44 swap-dx-lanes:
45 $ref: /schemas/types.yaml#/definitions/uint32-array
46 description: |
47 Specifies the ports which will swap the differential-pair (D+/D-),
48 default is not-swapped.
49
50 # Required child nodes:
51
52 patternProperties:
53 "^usb-phy@[0|1]$":
54 type: object
55 description:
56 Each UTMI PHY port must be represented as a sub-node.
57
58 properties:
59 reg:
60 description: phy port index.
61 maxItems: 1
62
63 "#phy-cells":
64 const: 0
65
66 required:
67 - reg
68 - "#phy-cells"
69
70 additionalProperties: false
71
72 required:
73 - compatible
74 - reg
75 - "#address-cells"
76 - "#size-cells"
77 - marvell,system-controller
78
79 additionalProperties: false
80
81 examples:
82 - |
83 cp0_utmi: utmi@580000 {
84 compatible = "marvell,cp110-utmi-phy";
85 reg = <0x580000 0x2000>;
86 marvell,system-controller = <&cp0_syscon0>;
87 #address-cells = <1>;
88 #size-cells = <0>;
89
90 cp0_utmi0: usb-phy@0 {
91 reg = <0>;
92 #phy-cells = <0>;
93 };
94
95 cp0_utmi1: usb-phy@1 {
96 reg = <1>;
97 #phy-cells = <0>;
98 };
99 };
100
101 cp0_usb3_0 {
102 usb-phy = <&cp0_usb3_0_phy0>;
103 phys = <&cp0_utmi0>;
104 phy-names = "utmi";
105 /* UTMI0 is connected to USB host controller (default mode) */
106 dr_mode = "host";
107 };
108
109 cp0_usb3_1 {
110 usb-phy = <&cp0_usb3_0_phy1>;
111 phys = <&cp0_utmi1>;
112 phy-names = "utmi";
113 /* UTMI1 is connected to USB device controller */
114 dr_mode = "peripheral";
115 };
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