1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2023 MediaTek, BayLibre
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Mediatek Sensor Interface MIPI CSI CD-PHY
9
10 maintainers:
11 - Julien Stephan <jstephan@baylibre.com>
12 - Andy Hsieh <andy.hsieh@mediatek.com>
13
14 description:
15 The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
16 receivers. The number of PHYs depends on the SoC model.
17 Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
18 capable.
19
20 properties:
21 compatible:
22 enum:
23 - mediatek,mt8365-csi-rx
24
25 reg:
26 maxItems: 1
27
28 num-lanes:
29 enum: [2, 3, 4]
30
31 '#phy-cells':
32 enum: [0, 1]
33 description: |
34 If the PHY doesn't support mode selection then #phy-cells must be 0 and
35 PHY mode is described using phy-type property.
36 If the PHY supports mode selection, then #phy-cells must be 1 and mode
37 is set in the PHY cells. Supported modes are:
38 - PHY_TYPE_DPHY
39 - PHY_TYPE_CPHY
40 See include/dt-bindings/phy/phy.h for constants.
41
42 phy-type:
43 description:
44 If the PHY doesn't support mode selection then this set the operating mode.
45 See include/dt-bindings/phy/phy.h for constants.
46 const: 10
47 $ref: /schemas/types.yaml#/definitions/uint32
48
49 required:
50 - compatible
51 - reg
52 - num-lanes
53 - '#phy-cells'
54
55 additionalProperties: false
56
57 examples:
58 - |
59 #include <dt-bindings/phy/phy.h>
60 soc {
61 #address-cells = <2>;
62 #size-cells = <2>;
63
64 csi0_rx: phy@11c10000 {
65 compatible = "mediatek,mt8365-csi-rx";
66 reg = <0 0x11c10000 0 0x2000>;
67 num-lanes = <2>;
68 #phy-cells = <1>;
69 };
70
71 csi1_rx: phy@11c12000 {
72 compatible = "mediatek,mt8365-csi-rx";
73 reg = <0 0x11c12000 0 0x2000>;
74 phy-type = <PHY_TYPE_DPHY>;
75 num-lanes = <2>;
76 #phy-cells = <0>;
77 };
78 };
79 ...
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