1 Device tree bindings for HiSilicon INNO USB2 PHY
2
3 Required properties:
4 - compatible: Should be one of the following strings:
5 "hisilicon,inno-usb2-phy",
6 "hisilicon,hi3798cv200-usb2-phy".
7 - reg: Should be the address space for PHY configuration register in peripheral
8 controller, e.g. PERI_USB0 for USB 2.0 PHY01 on Hi3798CV200 SoC.
9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
10 reference clock.
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
12 signal.
13 - #address-cells: Must be 1.
14 - #size-cells: Must be 0.
15
16 The INNO USB2 PHY device should be a child node of peripheral controller that
17 contains the PHY configuration register, and each device supports up to 2 PHY
18 ports which are represented as child nodes of INNO USB2 PHY device.
19
20 Required properties for PHY port node:
21 - reg: The PHY port instance number.
22 - #phy-cells: Defined by generic PHY bindings. Must be 0.
23 - resets: The phandle and reset specifier pair for PHY port reset signal.
24
25 Refer to phy/phy-bindings.txt for the generic PHY binding properties
26
27 Example:
28
29 perictrl: peripheral-controller@8a20000 {
30 compatible = "hisilicon,hi3798cv200-perictrl", "simple-mfd";
31 reg = <0x8a20000 0x1000>;
32 #address-cells = <1>;
33 #size-cells = <1>;
34 ranges = <0x0 0x8a20000 0x1000>;
35
36 usb2_phy1: usb2-phy@120 {
37 compatible = "hisilicon,hi3798cv200-usb2-phy";
38 reg = <0x120 0x4>;
39 clocks = <&crg HISTB_USB2_PHY1_REF_CLK>;
40 resets = <&crg 0xbc 4>;
41 #address-cells = <1>;
42 #size-cells = <0>;
43
44 usb2_phy1_port0: phy@0 {
45 reg = <0>;
46 #phy-cells = <0>;
47 resets = <&crg 0xbc 8>;
48 };
49
50 usb2_phy1_port1: phy@1 {
51 reg = <1>;
52 #phy-cells = <0>;
53 resets = <&crg 0xbc 9>;
54 };
55 };
56
57 usb2_phy2: usb2-phy@124 {
58 compatible = "hisilicon,hi3798cv200-usb2-phy";
59 reg = <0x124 0x4>;
60 clocks = <&crg HISTB_USB2_PHY2_REF_CLK>;
61 resets = <&crg 0xbc 6>;
62 #address-cells = <1>;
63 #size-cells = <0>;
64
65 usb2_phy2_port0: phy@0 {
66 reg = <0>;
67 #phy-cells = <0>;
68 resets = <&crg 0xbc 10>;
69 };
70 };
71 };
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