1 ROCKCHIP HDMI PHY WITH INNO IP BLOCK
2
3 Required properties:
4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
14 - clock-output-names : shall be the name for the output clock.
15 - interrupts : phandle + interrupt specified for the hdmiphy interrupt
16 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
17
18 Optional properties for rk3328-hdmi-phy:
19 - nvmem-cells = phandle + nvmem specifier for the cpu-version efuse
20 - nvmem-cell-names : "cpu-version" to read the chip version, required
21 for adjustment to some frequency settings
22
23 Example:
24 hdmi_phy: hdmi-phy@12030000 {
25 compatible = "rockchip,rk3228-hdmi-phy";
26 reg = <0x12030000 0x10000>;
27 #phy-cells = <0>;
28 clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;
29 clock-names = "sysclk", "refoclk", "refpclk";
30 #clock-cells = <0>;
31 clock-output-names = "hdmi_phy";
32 status = "disabled";
33 };
34
35 Then the PHY can be used in other nodes such as:
36
37 hdmi: hdmi@200a0000 {
38 compatible = "rockchip,rk3228-dw-hdmi";
39 ...
40 phys = <&hdmi_phy>;
41 phy-names = "hdmi";
42 ...
43 };
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